HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 113
HD6437101
Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6437101.pdf
(560 pages)
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6.3.3
ISR is a 16-bit register that indicates the interrupt request status of the external interrupt input pins
IRQ0 to IRQ3. When IRQ interrupts are set to edge detection, held interrupt requests can be
withdrawn by writing 0 to IRQnF after reading IRQnF = 1.
Bit
15 to 8 ⎯
7
6
5
4
3 to 0
Bit Name
IRQ0F
IRQ1F
IRQ2F
IRQ3F
⎯
IRQ Status Register (ISR)
Initial
Value
All 0
0
0
0
0
All 0
R/W
R
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
IRQ0 to IRQ3 Flags
These bits display the IRQ0 to IRQ3 interrupt request
status.
[Setting condition]
•
[Clearing conditions]
•
•
•
Reserved
These bits are always read as 0. The write value should
always be 0.
When interrupt source that is selected by ICR1 and
ICR2 has occurred.
When 0 is written after reading IRQnF = 1
When interrupt exception processing has been
executed at high level of IRQn input under the low
level detection mode.
When IRQn interrupt exception processing has been
executed under the edge detection mode of falling
edge, rising edge, or both falling and rising edges.
Rev.1.00 Sep. 18, 2008 Page 79 of 522
Section 6 Interrupt Controller (INTC)
REJ09B0069-0100
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