HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 315

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HD6437101

Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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9.6.2
If a timer counter increment clock pulse is generated during the T3 state of a write cycle to TCNT,
the write takes priority and the timer counter is not incremented. Figure 9.8 shows this operation.
9.6.3
If the values of bits CKS2 to CKS0 in the timer control/status register (TCSR) are rewritten while
the WDT is running, the count may not increment correctly. Always stop the watchdog timer (by
clearing the TME bit to 0) before rewriting the values of bits CKS2 to CKS0.
9.6.4
To prevent incorrect operation, always stop the watchdog timer (by clearing the TME bit to 0)
before switching between interval timer mode and watchdog timer mode.
TCNT Write and Increment Contention
Changing CKS2 to CKS0 Bit Values
Changing between Watchdog Timer/Interval Timer Modes
Address
Internal write
signal
TCNT input
clock
TCNT
CK
Figure 9.8 Contention between TCNT Write and Increment
TCNT write cycle
T 1
TCNT address
N
T 2
Rev.1.00 Sep. 18, 2008 Page 281 of 522
Counter write data
T 3
M
Section 9 Watchdog Timer
REJ09B0069-0100

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