HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 490
HD6437101
Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6437101.pdf
(560 pages)
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Section 18 Power-Down Modes
• MSTCR2
Bit
15
14
13
12
11 to 8
7
6
5
4
3 to 0
18.3
18.3.1
(1) Transition to Sleep Mode
If a SLEEP instruction is executed while the SSBY bit in SBYCR is cleared to 0, the CPU enters
sleep mode. In sleep mode, CPU operation stops, however the contents of the CPU's internal
registers are retained. Peripheral functions except the CPU do not stop.
(2) Clearing Sleep Mode
Sleep mode is cleared by the conditions below.
• Clearing by a power-on reset
Rev.1.00 Sep. 18, 2008 Page 456 of 522
REJ09B0069-0100
When the RES pin is driven low, the CPU enters the reset state. When the RES pin is driven
high after the elapse of the specified reset input period, the CPU starts the reset exception
handling.
Operation
Sleep Mode
Bit Name
⎯
MSTP14
MSTP13
MSTP12
⎯
⎯
MSTP6
MSTP5
MSTP4
⎯
Initial
Value
1
1
1
1
All 0
1
1
1
1
All 0
R/W
R
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R
Description
Reserved
This bit is always read as 1. The write value should
always be 1.
Motor management timer (MMT)
Multifunction timer pulse unit (MTU)
Compare match timer (CMT)
Reserved
These bits are always read as 0. The write value
should always be 0
Reserved
This bit is always read as 1. The write value should
always be 1.
A/D converter (A/D2)
A/D converter (A/D1)
A/D converter (A/D0)
Reserved
These bits are always read as 0. The write value
should always be 0.
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