HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 200
HD6437101
Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6437101.pdf
(560 pages)
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Section 8 Multifunction Timer Pulse Unit (MTU)
• When TGR is an output compare register
• When TGR is an input capture register
Example of Buffer Operation Setting Procedure: Figure 8.15 shows an example of the buffer
operation setting procedure.
Rev.1.00 Sep. 18, 2008 Page 166 of 522
REJ09B0069-0100
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 8.13.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 8.14.
Select TGR function
Set buffer operation
Input capture
signal
<Buffer operation>
Buffer operation
register
Buffer
register
Buffer
Figure 8.15 Example of Buffer Operation Setting Procedure
Start count
Figure 8.13 Compare Match Buffer Operation
Figure 8.14 Input Capture Buffer Operation
[1]
[2]
[3]
Compare match signal
Timer general
register
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
Comparator
TCNT
TCNT
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