HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 232

• Manufacturer Part Number: HD6437101
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 8 Multifunction Timer Pulse Unit (MTU)
Complementary PWM Mode PWM Output Generation Method: In complementary PWM
mode, 3-phase output is performed of PWM waveforms with a non-overlap time between the
positive and negative phases. This non-overlap time is called the dead time.
A PWM waveform is generated by output of the output level selected in the timer output control
register in the event of a compare-match between a counter and data register. While TCNTS is
counting, data register and temporary register values are simultaneously compared to create
consecutive PWM pulses from 0 to 100%. The relative timing of on and off compare-match
occurrence may vary, but the compare-match that turns off each phase takes precedence to secure
the dead time and ensure that the positive phase and negative phase on times do not overlap.
Figures 8.40 to 8.42 show examples of waveform generation in complementary PWM mode.
The positive phase/negative phase off timing is generated by a compare-match with the solid-line
counter, and the on timing by a compare-match with the dotted-line counter operating with a delay
of the dead time behind the solid-line counter. In the T1 period, compare-match a that turns off the
negative phase has the highest priority, and compare-matches occurring prior to a are ignored. In
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Negative phase
Positive phase
Figure 8.39 Example of Initial Output in Complementary PWM Mode (2)
output
output
Timer output control register settings
OLSN bit: 0 (initial output: high; active level: low)
OLSP bit: 0 (initial output: high; active level: low)
Complementary
PWM mode
(TMDR setting)
Initial output
TGR_4
TCNT_3, 4 value
TDDR
TCNT_3, 4 count start
(TSTR setting)
TCNT_3
TCNT_4
Active level
Time