HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 573
HD6417706
Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417706.pdf
(709 pages)
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21.4.3
An H-UDI reset is executed by setting an H-UDI reset assert command in SDIR. An H-UDI reset
is of the same kind as a power-on reset. An H-UDI reset is released by inputting an H-UDI reset
negate command.
The interval required between the H-UDI reset assert command and the H-UDI reset negate
command is the same as the time for which the RESETP pin is held low in order to execute a
power-on reset.
21.4.4
The H-UDI interrupt function generates an interrupt by setting a command from the H-UDI in the
SDIR. An H-UDI interrupt is a general exception/interrupt operation, resulting in a branch to an
address based on the VBR value plus offset, and return by the RTE instruction. This interrupt
request has a fixed priority level of 15.
H-UDI interrupts are not accepted in sleep mode or standby mode.
21.4.5
The JTAG-based bypass mode for the H-UDI pins can be selected by setting a command from the
H-UDI in the SDIR.
21.4.6
It is possible to recover from sleep mode by setting a command (0001) from the H-UDI in SDIR.
Chip internal reset
CPU state
H-UDI Interrupt
Using H-UDI to Recover from Sleep Mode
H-UDI Reset
Bypass
SDIR
H-UDI reset assert
Figure 21.3 H-UDI Reset
H-UDI reset negate
Rev. 4.00, 03/04, page 527 of 660
Branch to H'A0000000
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