HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 550

no-image

HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417706
Manufacturer:
TDK
Quantity:
500
Part Number:
HD6417706
Manufacturer:
TOSH
Quantity:
1 000
Part Number:
HD6417706-SH3-133V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417706BP133
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417706BP133V
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD6417706F120DV
Manufacturer:
HITACHI
Quantity:
96
Part Number:
HD6417706F120DV
Manufacturer:
RENESAS/PBF
Quantity:
375
Part Number:
HD6417706F120DV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417706F133
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417706F133V
Manufacturer:
EDISON
Quantity:
2 000
Part Number:
HD6417706F133V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
HD6417706F133V
Quantity:
27
When the mode or analog input channel must be switched during A/D conversion, to prevent
incorrect operation, first clear the ADST bit to 0 in ADCSR to halt A/D conversion. After making
the necessary changes, set the ADST bit to 1 to start A/D conversion again. The ADST bit can be
set at the same time as the mode or channel is changed.
Typical operations when channel 1 (AN1) is selected in single mode are described next.
Figure 19.5 shows a timing diagram for this example.
1. Single mode is selected (MULTI = 0), input channel AN1 is selected (CH2 = CH1 = 0, CH0 =
2. When A/D conversion is completed, the result is transferred into ADDRB. At the same time
3. Since ADF = 1 and ADIE = 1, an ADI interrupt is requested.
4. The A/D interrupt processing routine starts.
5. The routine reads ADCSR, then writes 0 in the ADF flag.
6. The routine reads and processes the conversion result (ADDRB = 0).
7. Execution of the A/D interrupt processing routine ends. Then, when the ADST bit is set to 1,
Rev. 4.00, 03/04, page 504 of 660
Channel 0 (AN0)
Channel 1 (AN1)
Channel 2 (AN2)
Channel 3 (AN3)
Note: * Downward arrows ( ) indicate instruction execution.
1), the A/D interrupt is enabled (ADIE = 1), and A/D conversion is started (ADST = 1).
the ADF flag is set to 1, the ADST bit is cleared to 0, and the A/D converter becomes idle.
A/D conversion starts to execute 2 to 7 above.
Figure 19.5 Example of A/D Converter Operation (Single Mode, Channel 1 Selected)
operating
operating
operating
operating
ADDRC
ADDRD
ADDRA
ADDRB
ADST
ADIE
ADF
A/D conversion starts
Waiting
Waiting
Waiting
Waiting
A/D conversion 1
Set*
Set*
A/D conversion result 2
A/D conversion result 1
Waiting
Clear*
Read result
Set*
A/D conversion result 2
Clear
Read result
Waiting

Related parts for HD6417706