MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 82

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Configuration Registers (CONFIG)
5.5 Configuration Register 2 (CONFIG2)
Data Sheet
82
NOTE:
NOTE:
†† Reset by POR only.
Address:
SSREC — Short Stop Recovery
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
When the LVISTOP is enabled, the system stabilization time for power
on reset and long stop recovery (both 4096 ICLK cycles) gives a delay
longer than the enable time for the LVI. There is no period where the
MCU is not protected from a low power condition. However, when using
the short stop recovery configuration option, the 32 ICLK delay is less
than the LVI’s turn-on time and there exists a period in start-up where the
LVI is not protecting the MCU.
STOP — STOP Instruction Enable
COPD — COP Disable Bit
The CONFIG2 register can be written once after each reset.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
SSREC enables the CPU to exit stop mode with a delay of 32 ICLK
cycles instead of a 4096 ICLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. (See
Operating Properly
For More Information On This Product,
1 = Stop mode recovery after 32 ICLK cycles
0 = Stop mode recovery after 4096 ICLK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
$001D
Bit 7
PEE
Figure 5-3. Configuration Register 2 (CONFIG2)
Configuration Registers (CONFIG)
0
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IRCDIS
STOP_
6
0
XCLKEN
(COP).)
STOP_
5
0
DIV2CLK
4
0
PCEH
Section 21. Computer
3
0
MC68HC908LJ24/LK24 — Rev. 2
PCEL
2
0
LVISEL1
0
1
††
MOTOROLA
LVISEL0
Bit 0
1
††