MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 130

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
8.6.3 PLL Multiplier Select Registers
Data Sheet
130
NOTE:
Address:
Address:
The PLL multiplier select registers (PMSH and PMSL) contain the
programming information for the modulo feedback divider.
MUL[11:0] — Multiplier Select Bits
The multiplier select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1).
Reset:
Reset:
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
These read/write bits control the modulo feedback divider that selects
the VCO frequency multiplier N. (See
Programming the
registers configure the modulo feedback divider the same as a value
of $0001. Reset initializes the registers to $0040 for a default multiply
value of 64.
For More Information On This Product,
Figure 8-6. PLL Multiplier Select Register High (PMSH)
Figure 8-7. PLL Multiplier Select Register Low (PMSL)
$0038
$0039
MUL7
Bit 7
Bit 7
0
0
0
Clock Generator Module (CGM)
Go to: www.freescale.com
= Unimplemented
MUL6
6
0
0
6
1
PLL.) A value of $0000 in the multiplier select
MUL5
5
0
0
5
0
MUL4
4
0
0
4
0
MUL11
8.4.3 PLL Circuits
MUL3
3
0
3
0
MC68HC908LJ24/LK24 — Rev. 2
MUL10
MUL2
2
0
2
0
MUL9
MUL1
1
0
1
0
and
MOTOROLA
8.4.6
MUL8
MUL0
Bit 0
Bit 0
0
0