MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 128

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
8.6.2 PLL Bandwidth Control Register
Data Sheet
128
VPR1 and VPR0 — VCO Power-of-Two Range Select Bits
The PLL bandwidth control register (PBWC):
Freescale Semiconductor, Inc.
These read/write bits control the VCO’s hardware power-of-two range
multiplier E that, in conjunction with L (See
Programming the
Register.) controls the hardware center-of-range frequency, f
VPR1:VPR0 cannot be written when the PLLON bit is set. Reset
clears these bits.
•
•
•
•
NOTE: Do not program E to a value of 3.
For More Information On This Product,
Selects automatic or manual (software-controlled) bandwidth
control mode
Indicates when the PLL is locked
In automatic bandwidth control mode, indicates when the PLL is in
acquisition or tracking mode
In manual operation, forces the PLL into acquisition or tracking
mode
VPR1 and VPR0
PRE1 and PRE0
Clock Generator Module (CGM)
Go to: www.freescale.com
Table 8-3. VPR1 and VPR0 Programming
00
01
10
Table 8-2. PRE 1 and PRE0 Programming
00
01
10
11
PLL, and
8.6.4 PLL VCO Range Select
E
0
1
2
P
0
1
2
3
MC68HC908LJ24/LK24 — Rev. 2
8.4.3 PLL
VCO Power-of-Two
Range Multiplier
Prescaler Multiplier
1
2
4
Circuits,
1
2
4
8
MOTOROLA
VRS
8.4.6
.