MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 417

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

21.4 I/O Signals
21.4.1 ICLK
21.4.2 STOP Instruction
21.4.3 COPCTL Write
21.4.4 Power-On Reset
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
NOTE:
A COP reset pulls the RST pin low for 32 ICLK cycles and sets the COP
bit in the SIM reset status register (SRSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ is held
at V
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
The following paragraphs describe the signals shown in
ICLK is the internal oscillator output signal. ICLK frequency is
approximately equal to 47-kHz. See
Specifications
The STOP instruction clears the COP prescaler.
Writing any value to the COP control register (COPCTL) (see
Control
of the prescaler. Reading the COP control register returns the low byte
of the reset vector.
The power-on reset (POR) circuit clears the COP prescaler 4096 ICLK
cycles after power-up.
Freescale Semiconductor, Inc.
TST
For More Information On This Product,
. During the break state, V
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12 through 5
Go to: www.freescale.com
for ICLK parameters.
TST
Section 24. Electrical
on the RST pin disables the COP.
Computer Operating Properly (COP)
Figure
21.5 COP
Data Sheet
I/O Signals
21-1.
417