MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 81

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

5.4 Configuration Register 1 (CONFIG1)
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
†† Reset by POR only.
Address:
The CONFIG1 register can be written once after each reset.
COPRS — COP Rate Select
LVISTOP — LVI Enable in Stop Mode
LVIRSTD — LVI Reset Disable
LVIPWRD — LVI Power Disable Bit
Reset:
Read:
Write:
COPRS selects the COP time-out period. Reset clears COPRS. (See
Section 21. Computer Operating Properly
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the
LVI to operate during stop mode. Reset clears LVISTOP. (See
Section 22. Low-Voltage Inhibit
LVIRSTD disables the reset signal from the LVI module. (See
Section 22. Low-Voltage Inhibit
LVIPWRD disables the LVI module. (See
Inhibit
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = COP time out period = 2
0 = COP time out period = 2
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
1 = LVI module power disabled
0 = LVI module power enabled
COPRS
$001F
Bit 7
Figure 5-2. Configuration Register 1 (CONFIG1)
Configuration Registers (CONFIG)
0
(LVI).)
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LVISTOP LVIRSTD LVIPWRD
6
0
5
0
= Unimplemented
0
13
18
4
††
– 2
– 2
(LVI).)
(LVI).)
4
4
Configuration Register 1 (CONFIG1)
ICLK cycles
ICLK cycles
3
0
0
Configuration Registers (CONFIG)
Section 22. Low-Voltage
(COP).)
SSREC
2
0
STOP
1
0
Data Sheet
COPD
Bit 0
0
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