MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 118

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
8.4.6 Programming the PLL
Data Sheet
118
NOTE:
The following conditions apply when in manual mode:
The following procedure shows how to program the PLL.
The round function in the following equations means that the real
number should be rounded to the nearest integer number.
1. Choose the desired bus frequency, f
2. Calculate the desired VCO frequency, f
3. Choose a practical PLL reference frequency, f
Freescale Semiconductor, Inc.
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ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
Before entering tracking mode (ACQ = 1), software must wait a
given time, t
Specifications.), after turning on the PLL by setting PLLON in the
PLL control register (PCTL).
Software must wait a given time, t
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGM are disabled.
where P is the power of two multiplier, and can be 0, 1, 2, or 3
reference clock divider, R. Typically, the reference is 32.768kHz
and R = 1.
Frequency errors to the PLL are corrected at a rate of f
stability and lock time reduction, this rate must be as fast as
possible. The VCO frequency must be an integer multiple of this
rate.
Clock Generator Module (CGM)
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f
VCLKDES
ACQ
(See
=
2
P
8.9 Acquisition/Lock Time
×
f
CGMPCLK
=
AL
2
, after entering tracking mode
P
BUSDES
MC68HC908LJ24/LK24 — Rev. 2
×
4
VCLKDES
×
f
BUSDES
.
RCLK
.
, and the
RCLK
MOTOROLA
/R. For