LAN91C96I_07 SMSC [SMSC Corporation], LAN91C96I_07 Datasheet - Page 91

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LAN91C96I_07

Manufacturer Part Number
LAN91C96I_07
Description
Non-PCI Single-Chip Full Duplex Ethernet Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Non-PCI Single-Chip Full Duplex Ethernet Controller
Chapter 12 Timing Diagrams
SMSC DS – LAN91C96I
A0-15
AEN, nSBHE
nIOCS16
nIORD
D0-15
BALE Tied High
IOCHRDY not used - t20 has to be met
*Note: The cycle time is defined only for consecutive accesses to the Data Register. These
values assume
that IOCHRDY is not used.
t15
t20
t3
t4
t5
t6
Address, nSBHE, AEN Setup to Control Active
Address, nSBHE, AEN Hold after Control
Inactive
nIORD Low to Valid Data
nIORD High to Data Floating
A4-A15, AEN Low, BALE High to nIOCS16
Low
Cycle time*
Figure 12.1 – Local Bus Consecutive Read Cycles
t15
t3
VALID ADDRESS
Parameter
t5
DATASHEET
VALID DATA
OUT
Page 91
t20
t4
t6
Z
min
185
10
20
VALID ADDRESS
typ
VALID DATA
max
OUT
25
15
12
units
Z
ns
ns
ns
ns
ns
ns
Rev. 03-28-07

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