LAN91C96I_07 SMSC [SMSC Corporation], LAN91C96I_07 Datasheet - Page 59

• Manufacturer Part Number: LAN91C96I_07
• Description: Non-PCI Single-Chip Full Duplex Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Non-PCI Single-Chip Full Duplex Ethernet Controller
SMSC DS – LAN91C96I
Behavior in FDSE mode
A) No deferral - The transmit channel is dedicated and always available - The device transmits whenever
B) No collision detection - There are no collisions in a switched full duplex environment.
Magic Packet Support
If the WAKEUP_EN bit in the Control Register (Bank1, Offset C) is set, the controller will generate the
interrupt; If this bit is not set, this functionality is disabled. Setting (1) the bit is meaningful only if the
function is enabled.
For Local Bus mode, when WAKEUP_EN bit in Control Register (Bank1, Offset C) is set, the controller is
set ready for scanning of Magic Packet, the device will not drop into lower power state.
When a magic packet is received, the Ethernet controller will generate an interrupt causing the host to
initiate a service routine to find the source of the event. The Interrupt bit in the ECSR is also set if the host
plans on polling the controller for Wakeup status.
it has a packet ready to be sent, while respecting the interframe spacing between transmit packets.
DATASHEET
Page 59
Rev. 03-28-07