LAN91C96I_07 SMSC [SMSC Corporation], LAN91C96I_07 Datasheet - Page 65

• Manufacturer Part Number: LAN91C96I_07
• Description: Non-PCI Single-Chip Full Duplex Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Non-PCI Single-Chip Full Duplex Ethernet Controller
SMSC DS – LAN91C96I
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5.
Save the Packet Number Register
Read the EPH Status Register
Acknowledge TX Interrupt
Check for Status of Transmission
Restore the Packet Number Register
Saved_PNR = Read Byte (Bank 2, Offset 2)
Temp = Read (Bank 0, Offset 2)
Write Byte (0x02, (Bank 2, Offset C));
If ( Temp AND 0x0001)
{
}
else
{
}
Write Byte (Saved_PNR, (Bank 2, Offset 2))
TX Interrupt With AUTO_RELEASE = FALSE
//If Successful Transmission
Step 4.1.1: Issue MMU Release (Release Specific Packet)
Step 4.1.2: Return from the routine
//Transmission has FAILED
// Now we can either release or re-enqueue the packet
Step 4.2.1: Get the packet to release/re-enqueue, stored in FIFO
Step 4.2.2: Write to the PNR
Step 4.2.3
Step 4.2.4: Re-Enable Transmission
Step 4.2.5: Return from the routine
DATASHEET
Write (0x00A0, (Bank2, Offset 0));
Temp = Read (Bank 2, Offset 4)
Temp = Temp & 0x003F
Write (Temp, (Bank2, Offset 2))
// Option 1: Release the packet
//Option 2: Re-Enqueue the packet
Temp = Read(Bank0, Offset 0);
Temp = Temp2 OR 0x0001
Write (Temp2, (Bank 0, Offset 0));
Figure 8.3 – TX INTR
Page 65
Write (0x00A0, (Bank2, Offset 0));
Write (0x00C0, (Bank2, Offset 0));
Rev. 03-28-07