LAN91C96I_07 SMSC [SMSC Corporation], LAN91C96I_07 Datasheet - Page 48

• Manufacturer Part Number: LAN91C96I_07
• Description: Non-PCI Single-Chip Full Duplex Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Note:
Rev. 03-28-07
I/O SPACE - BANK2
I/O SPACE - BANK2
FAILED
RESERVED
PACKET NUMBER AT TX AREA - The value written into this register determines which packet number is
accessible through the TX area. Some MMU commands use the number stored in this register as the
packet number parameter. This register is cleared by a RESET or a RESET MMU Command.
RESERVED – This bit is reserved.
This register is updated upon an ALLOCATE MEMORY MMU command.
FAILED - A ”0” indicates a successful allocation completion. If the allocation fails the bit is set and only
cleared when the pending allocation is satisfied. Defaults high upon reset and reset MMU command. For
polling purposes, the ALLOC_INT in the Interrupt Status Register should be used because it is
synchronized to the read operation.
Sequence:
1.
2.
3.
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request.
The value is only valid if the FAILED bit is clear.
For software compatibility with future versions, the value read from the ARR after an allocation request is
intended to be written into the PNR as is, without masking higher bits (provided FAILED = “0”).
OFFSET
OFFSET
1
Allocate Command
Poll ALLOC_INT bit until set
Read Allocation Result Register
0
2
3
0
0
ALLOCATION RESULT REGISTER
PACKET NUMBER REGISTER
0
0
DATASHEET
NAME
NAME
0
0
Page 48
ALLOCATED PACKET NUMBER
PACKET NUMBER AT TX AREA
0
0
Non-PCI Single-Chip Full Duplex Ethernet Controller
READ/WRITE
READ ONLY
0
TYPE
TYPE
0
0
0
SYMBOL
SYMBOL
ARR
SMSC DS – LAN91C96I
PNR
0
0