LAN91C96I_07 SMSC [SMSC Corporation], LAN91C96I_07 Datasheet - Page 26
![no-image](/images/no-image-200.jpg)
LAN91C96I_07
Manufacturer Part Number
LAN91C96I_07
Description
Non-PCI Single-Chip Full Duplex Ethernet Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN91C96I_07.pdf
(109 pages)
- Current page: 26 of 109
- Download datasheet (548Kb)
5.2
Rev. 03-28-07
Interrupt Output
Ethernet Interrupt Source
Ethernet Interrupt Enable
Ethernet Interrupt Status Bit
8 BIT MODE
((nEN16=1)
(16BIT=0))
16 BIT MODE
otherwise
16BIT:
IOis8:
nEN16:
8 Bit mode:
Interrupt Structure
The Ethernet interrupt is conceptually equivalent to the LAN91C94 interrupt line, it is the or function of all
enabled interrupts within the Ethernet core. The enabling, reporting, and clearing of these sources is
controlled by the ECOR register. The interrupt structure is similar for Local Bus modes with the following
exceptions:
FUNCTION
Ethernet I/O
space (1)
CONFIGURATION REGISTER bit 7
CSR register bit 5
pin nEN16
((IOis8 = 1) + (nMIS16 = 1)
Table 5.2 - Bus Transactions In Local Bus Mode
nIORD/
nIOWR
SIGNALS
A0
USED
0
1
0
0
1
1
Table 5.1 - LAN91C96I Address Space
INTR0-3
OR function of all interrupt bits specified in the Interrupt Status Register
ANDed with their respective Enable bits
Not Applicable in Local Bus mode
Intr bit in ECSR
Table 5.3 – Interrupt Merging
DATASHEET
LOCAL
NSBHE
BUS
Y
X
X
0
1
0
1
Page 26
ON-CHIP
Y
LOCAL BUS MODE
Even byte
Even byte
Even byte
Odd byte
D0-7
16 locations
Non-PCI Single-Chip Full Duplex Ethernet Controller
-
DEPTH
Invalid cycle
WIDTH
8 or 16
bits
Odd byte
Odd byte
D8-15
-
-
-
SMSC DS – LAN91C96I
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