AMD-766AC AMD [Advanced Micro Devices], AMD-766AC Datasheet - Page 26

• Manufacturer Part Number: AMD-766AC
• Description: Peripheral Bus Controller
• Manufacturer: AMD [Advanced Micro Devices]

23167B – March 2001
Snoop-disabled clock control (C3). In C3, the processor is placed into the stop-grant state such that the processor’s
cache cannot be snooped; PCI master requests result in resume events (see PM04[BM_RLD]). Signal control during
C3 is specified by C3A50.
Full on (FON). In FON, all the power planes are powered and the processor is not in the stop-grant state.
The following figure shows the system power state transitions.
soft off; suspend to
suspend to RAM
RPWRON high
PWRON# high
PWRON# high
RPWRON low
mechanical off
VDD_AUX power applied
and C3A43[G3TOS5]=1
SOFF/STD
failure
Power
MOFF
STR
disk
VDD_AUX power applied
and C3A43[G3TOS5]=0
or power button override
PORTCF9[FULLRST],
CPU initiated (PM04),
CPU initiated (PM04)
Resume event
Resume event
Preliminary Information
PWRON#,
RPWRON
asserted
full on
FON
AMD-766
CPU initiated (PM14)
CPU initiated (PM15)
CPU initiated (PM04)
Resume event
Resume event
Resume event
TM
Peripheral Bus Controller Data Sheet
sleep state; see
condition; see
reduction and
C2 plus clock
clock-control
based power
control; see
Stop-grant
C3A50
C3A50
C3A50
POS
C2
C3
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