ics9248-163 Integrated Device Technology, ics9248-163 Datasheet

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ics9248-163

Manufacturer Part Number
ics9248-163
Description
Amd - K7 System Clock Chip
Manufacturer
Integrated Device Technology
Datasheet
1.ICS9248-163.pdf (14 pages)
AMD - K7™ System Clock Chip
Third party brands and names are the property of their respective owners.
Recommended Application:
Output Features:
•
•
•
•
•
•
•
Features:
•
•
•
•
Block Diagram
CPU_STOP#
9248-163 Rev A 9/22/00
SEL24_48#
BUFFER IN
FS (3:0)
1 - Differential pair open drain CPU clocks
1 - CPU clock @ 3.3V
13 - SDRAM @ 3.3V
6 - PCI @3.3V,
1 - 48MHz, @3.3V fixed.
1 - 24/48MHz @ 3.3V
2 - REF @3.3V, 14.318MHz.
Up to 166MHz frequency support
Support power management: CPU stop and Power down
Mode from I
Spread spectrum for EMI control
(± 0.25% center spread).
Uses external 14.318MHz crystal
SDATA
SCLK
PD#
X2
X1
XTAL
OSC
Spectrum
PLL2
2
Spread
Control
Config.
Integrated
Circuit
Systems, Inc.
C programming.
PLL1
Logic
Reg.
DIVDER
DIVDER
DRIVER
SDRAM
CPU
PCI
/ 2
Stop
48MHz
24_48MHz
CPUCLK
CPUCLKC0
CPUCLKT0
PCICLK (4:0)
PCICLK_F
SDRAM (11:0)
SDRAM_OUT
REF (1:0)
*SEL24_48#/PCICLK1
REF0/CPU_STOP*
*MODE/PCICLK_F
Functionality
F
*FS3/PCICLK0
0
0
0
0
0
0
0
0
S
1
1
1
1
1
1
1
1
3
BUFFER IN
SDRAM11
SDRAM10
VDDSDR
VDDREF
PCICLK2
PCICLK3
PCICLK4
SDRAM9
SDRAM8
Preliminary Product Preview
VDDPCI
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
SDATA
SCLK
F
GND
GND
GND
GND
VDD
S
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X1
X2
2
48-Pin 300mil SSOP
Pin Configuration
F
S
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
1
2
3
4
5
6
7
8
9
F
S
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
ICS9248-163
(
0 1
0 1
0 1
0 1
0 1
0 1
0 1
0 1
1 1
1 1
1 1
1 1
1 1
3 1
9
9
C
M
. 0
. 5
. 1
. 2
. 0
. 3
. 5
. 0
. 7
. 9
. 0
. 1
. 3
. 5
. 7
. 3
P
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
H
0 0
0 0
U
0 0
0 0
0 9
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 3
) z
REF1/FS2*
GND
CPUCLK
GND
CPUCLKC0
CPUCLKT0
VDDA
PD#*
SDRAM_OUT
GND
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
VDD48
48MHz/FS0*
24/48MHz/FS1*
P
(
C
3
3
3
3
3
3
3
3
3
3
3
M
3
3
3
3
3
C I
. 0
. 1
. 3
. 4
. 3
. 4
. 5
. 3
. 5
. 6
. 6
. 7
. 7
. 8
. 9
. 3
H
0 0
0 0
0 0
0 0
0 0
7 6
7 6
7 5
3 3
3 3
7 6
3 3
7 6
7 6
3 3
3 3
L
) z
K

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ics9248-163 Summary of contents

Page 1

... PCICLK (4: PCICLK_F 1 1 SDRAM (11:0) 1 SDRAM_OUT PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. ICS9248-163 Pin Configuration 48 1 REF1/FS2 GND 46 GND 3 CPUCLK GND 44 X2 ...

Page 2

... ICS9248-163 Preliminary Product Preview Pin Descriptions ...

Page 3

... Power Groups Third party brands and names are the property of their respective owners ICS9248-163 Preliminary Product Preview ...

Page 4

... ICS9248-163 Preliminary Product Preview Serial Configuration Command Bitmap ...

Page 5

... ICS9248-163 Preliminary Product Preview ...

Page 6

... ICS9248-163 Preliminary Product Preview Absolute Maximum Ratings Electrical Characteristics - Input/Supply/Common Output Parameters 70º C; Supply Voltage V = 3.3 V +/-5% (unless otherwise stated PARAMETER SYMBOL Input High Voltage V IH Input Low Voltage V IL Input High Current I IH Input Low Current I IL1 Input Low Current ...

Page 7

... Note 2 Note 2 Note required for switching, where /2-150mV; Max=(Vpullup (external) ICS9248-163 Preliminary Product Preview MIN TYP MAX UNITS 2.4 0.4 - MIN TYP MAX 1 1.2 0.4 18 0.9 0.9 V pullup(external) 0.4 + 0.6 V pullup(external) ...

Page 8

... ICS9248-163 Preliminary Product Preview Electrical Characteristics - CPUCLK 70º 3.3 V +/-5 PARAMETER SYMBOL Output High Voltage V OH2B Output Low Voltage V OL2B Output High Current I OH2B Output Low Current I OL2B 1 Rise Time t r2B 1 Fall Time t f2B 1 Duty Cycle d t2B 1 Skew t sk2B ...

Page 9

... L CONDITIONS ICS9248-163 Preliminary Product Preview MIN TYP MAX UNITS 2.6 0.4 - 200 MIN TYP MAX UNITS 2.4 0 ...

Page 10

... ICS9248-163 Preliminary Product Preview General I How to Write: How to Write: Controller (Host) ICS (Slave/Receiver) Start Bit Address D2 (H) Dummy Command Code Dummy Byte Count Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Stop Bit Notes: Third party brands and names are the property of their respective owners. ...

Page 11

... Shared Pin Operation - Input/Output Pins Programming Header Via to Gnd Device Pad Third party brands and names are the property of their respective owners. Preliminary Product Preview Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig. 1 ICS9248-163 ...

Page 12

... ICS9248-163 Preliminary Product Preview PD# Timing Diagram PD# CPUCLKT CPUCLKC PCICLK VCO Crystal Third party brands and names are the property of their respective owners. ...

Page 13

... CPU_STOP# Timing Diagram Third party brands and names are the property of their respective owners. ICS9248-163 Preliminary Product Preview ...

Page 14

... ICS9248-163 Preliminary Product Preview Ordering Information ICS9248yF-163-T ICS XXXX PPP - T Third party brands and names are the property of their respective owners. SYMBOL In Millimeters COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN A 2.413 2.794 .095 A1 0.203 0.406 .008 b 0.203 0.343 .008 c 0.127 ...

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