ics950401 Integrated Device Technology, ics950401 Datasheet

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ics950401

Manufacturer Part Number
ics950401
Description
Amd - K8 System Clock Chip
Manufacturer
Integrated Device Technology
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
ics950401CGLFT
Manufacturer:
ICS
Quantity:
20 000
AMD - K8™ System Clock Chip
Recommended Application:
AMD K8 Systems
Output Features:
Features:
Block Diagram
PCI33/HT66SEL#
0499C—11/01/04
PCI_STOP#
24_48SEL#
2 - Differential pair push-pull CPU clocks @ 3.3V
7 - PCI (Including 1 free running) @3.3V
3 - Selectable HT/PCI 66/33MHz @3.3V
1 - 48MHz, @3.3V fixed.
1 - 24/48MHz @ 3.3V
3 - REF @3.3V, 14.318MHz.
Up to 220MHz frequency support
Support power management: PCI stop and stop
clocks controlled by I
Spread spectrum for EMI reduction
Uses external 14.318MHz crystal
I
Supports Hypes transport technology (HT66 output).
2
SPREAD
C programmability features
FS (2:0)
SDATA
SCLK
X2
X1
XTAL
OSC
Spectrum
PLL2
Spread
Control
Config.
Integrated
Circuit
Systems, Inc.
PLL1
Logic
Reg.
2
DIVDER
C.
DIVDER
CPU
PCI
/ 2
X 2
Stop
Stop
48MHz
24_48MHz
CPUCLKC (1:0)
CPUCLKT (1:0)
PCICLK (5:0)
PCICLK_F
PCICLK33/HT66(2:0)
REF (2:0)
PCICLK33/HT66_0 7
PCICLK33/HT66_1 8
PCICLK33/HT66_2 11
*PCI33/HT66SEL# 6
Functionality
FS2 FS1 FS0
0
0
0
0
0
1
1
1
1
*PCI_STOP# 24
0
0
0
1
1
0
0
1
1
*FS0/REF0 1
PCICLK_F 23
PCICLK0 13
PCICLK1 14
PCICLK2 17
PCICLK3 18
PCICLK4 21
PCICLK5 22
VDDREF 2
VDDPCI 9
VDDPCI 16
VDDPCI 19
0
1
1
0
1
0
1
0
1
GND 5
GND 10
GND 15
GND 20
PCI33_HT66
NC 12
X1 3
X2 4
SEL#
Pin Configuration
X
0
1
X
X
X
X
X
X
** Internal Pull-Down Resistor
* Internal Pull-Up Resistor
48-SSOP/ TSSOP
180.00
220.00
100.00
133.33
166.66
200.00
CPU
Hi-Z
X
X
PCI33
30.00
36.56
33.33
33.33
33.33
33.33
Hi-Z
X/6
X/6
ICS950401
PCI33_HT66
48 REF1/FS1*
47 GND
46 VDDREF
45 REF2/FS2*
44 SPREAD*
43 VDDA
42 GNDA
41 CPUCLKT0
40 CPUCLKC0
39 GND
38 VDDCPU
37 CPUCLKT1
36 CPUCLKC1
35 VDD
34 GND
33 GNDA
32 VDDA
31 48MHz
30 GND
29 VDD
28 24_48MHz/Sel24_48#*
27 GND
26 SDATA
25 SCLK
33.33/66.66
33.33/66.66
33.33/66.66
33.33/66.66
60.00
73.12
Hi-Z
X/3
X/6
Hammer Operation
Athlon Compatible
Athlon Compatible
Tri-State Mode
10% under-clk
Bypass Mode
Bypass Mode
COMMENTS
10% over-clk
Reserved

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ics950401 Summary of contents

Page 1

... REF (2: Stop CPUCLKC (1: CPUCLKT (1:0) PCICLK (5:0) Stop PCICLK_F PCICLK33/HT66(2:0) ICS950401 Pin Configuration 48 REF1/FS1* 47 GND VDDREF 2 46 VDDREF REF2/FS2 SPREAD* GND 5 43 VDDA 42 GNDA 41 CPUCLKT0 40 CPUCLKC0 VDDPCI 9 39 GND GND 10 38 VDDCPU 37 CPUCLKT1 CPUCLKC1 ...

Page 2

... ICS950401 Pin Descriptions PIN PIN PIN # NAME TYPE 1 I/O *FS0/REF0 2 VDDREF PWR OUT 5 GND PWR 6 *PCI33/HT66SEL PCICLK33/HT66_0 IN 8 PCICLK33/HT66_1 IN 9 VDDPCI PWR 10 GND PWR 11 PCICLK33/HT66_2 PCICLK0 OUT 14 PCICLK1 OUT 15 GND PWR 16 VDDPCI PWR 17 PCICLK2 OUT 18 PCICLK3 OUT ...

Page 3

... General Description The ICS950401 is a main clock synthesizer chip for AMD-K8. This provides all clocks required for Clawhammer and Sledgehammer systems. Spread spectrum may be enabled through I to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS950401 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations ...

Page 4

... ICS950401 General I How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the begining byte location = N • ICS clock will acknowledge • Controller (host) sends the data byte count = X • ...

Page 5

... default back to hardware setting for FS(4:0). 5 ICS950401 ...

Page 6

... ICS950401 Byte 1: CPU, Active/Inactive Register (1= enable disable ...

Page 7

... PLL bypass mode. 0499C—11/01/04 Byte 8: Single Pulse Mode Control Register (1= enable disable ICS950401 ...

Page 8

... ICS950401 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . Input ESD protection usung human body model > 1KV Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...

Page 9

... Measured @ the Hammer test load (single-ended measurement) Change in Common Mode Voltage, Measured @ the Hammer test load (single- ended measurement 50 required for switching, where /2-150mV; Max=(Vpullup (external) 9 ICS950401 MIN TYP MAX 1.2 0 0.4 2.3 -150 150 1.05 1.45 -200 ...

Page 10

... ICS950401 Electrical Characteristics - PCICLK, PCICLK33/HT66 (33MHz 70º 3.3 V +/-5 PARAMETER SYMBOL Output High Voltage V OH1 Output Low Voltage V OL1 Output High Current I OH1 Output Low Current I OL1 1 Rise Edge Rate 1 Fall Edge Rate 1 Duty Cycle Jitter, Cycle-to-cycle ...

Page 11

... 2 0 Measured from 20-80% Measured from 80- for 24_48MHz clock for 48MHz clock ICS950401 MIN TYP MAX UNITS 2.4 V 0 0.5 2 V/ns 0 1000 ps -1000 1000 ps MIN TYP MAX UNITS 2 ...

Page 12

... ICS950401 Shared Pin Operation - Input/Output Pins The I/O pins designated by (input/output) on the ICS9248- 175 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on these pins at this time is read and stored into a 5-bit internal data latch. At the end of Power-On reset, (see AC characteristics for timing values), the device changes the mode of operations for these pins to an output function ...

Page 13

... Reference Doc.: JEDEC Publication 95, MO-118 10-0034 Designation for tape and reel packaging Lead Free (Optional) Package Type F = SSOP Revision Designator (will not correlate with datasheet revision) Device Type Prefix ICS = Standard Device 13 ICS950401 In Millimeters In Inches COMMON DIMENSIONS MIN MAX MIN 2.41 2.80 .095 0.20 ...

Page 14

... ICS950401 INDEX INDEX AREA AREA 6.10 mm. Body, 0.50 mm. pitch TSSOP (0.020 mil) (240 mil) Ordering Information ICS950401yGLF-T Example: ICS XXXX y G LF- T 0499C—11/01/ SYMBOL aaa - VARIATIONS N SEATING SEATING PLANE ...

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