tsc693e ETC-unknow, tsc693e Datasheet - Page 78

• Manufacturer Part Number: tsc693e
• Description: Memory Controller
• Manufacturer: ETC-unknow

TSC693E
TRST* - Test Reset (input)
Reset the TAP controller.
TMS - Test Mode Select (input)
Selects test mode of the TAP controller.
TDI - Test Data Input (input)
Test scan register data input.
TDO - Test Data Output (output)
Test scan register data output, not affected by MODE.
4.2.5. UART Interface
WDCLK - Watch Dog Clock (input)
WDCLK is the WD clock input but this clock can also be used as a clock input for the
UART interface. The clock frequency of WDCLK must be less than the clock frequency
of SYSCLK, i.e. f
< f
.
WDCLK
SYSCLK
RXA - Receive Data channel A (input)
RXA is the serial data input for channel A of the UART.
RXB - Receive Data channel B (input)
RXB is the serial data input for channel B of the UART.
TXA - Transmit Data channel A (output)
TXA is the serial data output for channel A of the UART.
TXB - Transmit Data channel B (output)
TXB is the serial data output for channel B of the UART.
MATRA MHS
Rev. D (10 Apr. 97)
78