tsc693e ETC-unknow, tsc693e Datasheet - Page 53

• Manufacturer Part Number: tsc693e
• Description: Memory Controller
• Manufacturer: ETC-unknow

1)
2)
3)
MATRA MHS
Rev. D (10 Apr. 97)
If RBR0 and RBR1 are set to the same value, RBR1 settings will have no effect.
Is at reset automatically written with same value as PROM8 input pin to MEC. A write operation to this bit has no effect
(is don't care).
If the NOPAR* signal is asserted, data parity is not checked even if enabled in this register.
17
20-18
23-21
26-24
27
28
29
31-30
P8 (2)
PSIZ
Reserved
ESIZ
EPA (3)
EEC
EEX
Reserved
*
000
000
000
0
0
0
00
PROM 8-bit wide
1 : 40-bit wide, EDAC and Parity
0 : 8-bit wide, Parity generation
PROM size
000 : 128 Kbyte
001 : 256 Kbyte
010 : 512 Kbyte
011 : 1 Mbyte
100 : 2 Mbyte
101 : 4 Mbyte
110 : 8 Mbyte
111 : 16 Mbyte
Not used
Exchange memory size
000 : 4 Kbyte
001 : 8 Kbyte
010 : 16 Kbyte
011 : 32 Kbyte
100 : 64 Kbyte
101 :128 Kbyte
110 :256 Kbyte
111 :512 Kbyte
Exchange memory parity protected
1 : enabled
0 : disabled
Exchange memory EDAC protected
1 : enabled
0 : disabled
(Note: When EDAC is enabled parity is enabled independent of EPA)
Exchange memory exists
1 : exists
0 : exists not
Not used
TSC693E
r
r/w
r
r/w
r/w
r/w
r/w
r
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