tsc693e ETC-unknow, tsc693e Datasheet - Page 34

• Manufacturer Part Number: tsc693e
• Description: Memory Controller
• Manufacturer: ETC-unknow

The interrupt allocation for the asynchronous traps is in accordance with the scheme in
Table 5 (page 35).
It is possible to mask each individual interrupt (except interrupt 15) by setting the
corresponding bit in the Interrupt Mask Register (see page 57).
The MEC includes a specific register called Interrupt Pending Register (see page 56),
which reflects the pending interrupts. It is possible to clear pending interrupts by setting
the corresponding bit in the Interrupt Clear Register (see page 57).
(Interrupt test description moved to paragraph 3.19.)
The interrupts in the IPR are cleared automatically when the interrupt is acknowledged.
The MEC will sample the trap address in order to know which bit to clear.
Upon receiving an interrupt, external or forced, the MEC issues a request on its IRL
outputs to the IU with the corresponding interrupt level. If two or more interrupts occur
MATRA MHS
Rev. D (10 Apr. 97)
DMA access error
This interrupt occurs if the DMA performs an access violation or illegal access.
UART error
This interrupt is generated by the UARTs if an error is detected.
UART A and B Data Ready or Transmitter Ready
These interrupts are generated by the UARTs each time a data word has been
correctly received and each time a data word has been sent.
Real Time Clock
This interrupt is issued by the real time clock timer tick.
General purpose timer
This interrupt is issued by the general purpose timer.
Correctable error in memory
This interrupt occurs if the EDAC detects and corrects an error.
Masked Hardware Errors
This occurs when there is a hardware error set in the Error and Reset Status
Register (see page 61) and the error is masked (an unmasked hardware error leads
to an Error Halt or Warm Reset instead of an interrupt, see paragraph 3.5.).
5 external individually prioritized interrupts
The sources of these interrupts are located outside the ERC32. Consequently these
interrupts are inputs to the MEC.
TSC693E
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