tsc693e ETC-unknow, tsc693e Datasheet - Page 57

• Manufacturer Part Number: tsc693e
• Description: Memory Controller
• Manufacturer: ETC-unknow

Interrupt Mask Register
Interrupt Clear Register
Interrupt Force Register
Watchdog Program
and Timeout Acknowledge Register 01F8 0060 H
The timeout for the watchdog before the watchdog interrupt occurs is calculated as:
Timeout =(16
The timeout for the watchdog before warm reset occurs is calculated as:
Reset timeout = Timeout + 16
Where WDCS is the Watchdog Clock Supply bit of the MEC Control Register and WDCLK is the
frequency of the WDCLK input signal.
Watchdog Trap Door Set
Write only with any data. A write to this register after reset but before the watchdog has
elapsed will disable the watchdog. The watchdog will stay disabled until it is
reprogrammed by writing to the Watchdog Program and Timeout Acknowledge
Register.
MATRA MHS
Rev. D (10 Apr. 97)
Bits
0
14-1
31-15
Bits
0
15-1
31-16
Bits
0
15-1
31-16
Bits
15-0
23-16
31-24
WDCS
(WDS+1) (WDC+1))/WDCLK
Name
Reserved
IM
Reserved
Name
Reserved
IC
Reserved
Name
Reserved
IF
Reserved
Name
WDC
WDS
WDR
WDCS
(WDS+1) (WDR+1)/WDCLK
Reset value
0
3FFFh
0h
Reset value
0
0h
0h
Reset value
0
0h
0h
Reset value
FFFFh
FFh
FFh
01F8 004C H
01F8 0050 H
01F8 0054 H
01F8 0064 H
Function
Not used
Masked interrupts
bit 1 = 1 : interrupt 1 masked
bit 1 = 0 : interrupt 1 not masked
..
bit 14 = 1 : interrupt 14 masked
bit 14 = 0 : interrupt 14 not masked
Not used
Function
Not used
Cleared interrupts
bit 1 = 1 : interrupt 1 cleared
bit 1 = 0 : interrupt 1 not cleared
..
bit 15 = 1 : interrupt 15 cleared
bit 15 = 0 : interrupt 15 not cleared
Not used
Function
Not used
Forced interrupts
bit 1 = 1 : interrupt 1 forced
bit 1 = 0 : interrupt 1 not forced
..
bit 15 = 1 : interrupt 15 forced
bit 15 = 0 : interrupt 15 not forced
Not used
Function
Preset 16-bit counter value
Preset 8-bit scaler value
Preset 8-bit reset counter value
TSC693E
r/w
r
r/w
r
r/w
-
w
-
r/w
r
r/w
r
r/w
w
w
w
57