zl50031 Zarlink Semiconductor, zl50031 Datasheet - Page 61

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zl50031

Manufacturer Part Number
zl50031
Description
Flexible 4 K X 2 K Channel Digital Switch With H.110 Interface And 2 K X 2 K Local Switch
Manufacturer
Zarlink Semiconductor
Datasheet

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Part Number:
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Manufacturer:
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Quantity:
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† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
Note 1:
AC Electrical Characteristics
1
2
3
4
5
6
7
8
NREFo
(8 kHz)
LREF0-3
(1.544 MHz)
Local Frame Boundary Offset
ST_FPo0/1 Width
ST_FPo0/1 Output Delay from Falling edge
of ST_FPo0/1 to falling edge of ST_CKo0/1
ST_FPo 0/1Output Delay from Falling edge
of ST_CKo0/1 to rising edge of ST_FPo0/1
ST_CKo0/1 Clock Period
ST_CKo0/1 Clock Pulse Width High
ST_CKo0/1 Clock Pulse Width Low
ST_CKo0/1 Clock Rise/Fall Time
No jitter presented on input reference clock.
Figure 25 - Reference Output Timing Diagram when (DIV1, DIV0) = (0, 1) in DOM2 Register
(4.096 MHz)
ST_FPo0/1
ST_CKo0/1
Figure 26 - Local Clock Timing Diagram when ST_CKo0/1 frequency = 4.096 MHz
Characteristic
Backplane Frame Boundary
t
rREF
t
ROD
t
R8KO15L
- Local Frame Pulse and Clock Timing,
1
t
t
t
FPW4
FODF4
t
CP4
CH4
t
fREF
Zarlink Semiconductor Inc.
t
ZL50031
R8KOP
t
rC4o
t
t
t
t
Sym.
LFBOS
FODF4
FODR4
FPW4
t
t
t
61
CP4
CH4
CL4
, t
C4o
t
t
fC4o
LFBOS
t
R8KO15H
236.5
236.5
118.3
118.3
118.3
118.3
Min.
Local Output Frame Boundary
6.5
t
FODR4
t
CL4
Typ.
ST_CKo = 4.096 MHz
244
244
251.5
125.8
125.8
251.5
125.8
125.8
Max.
25
14
Units
t
rC4o
ns
ns
ns
ns
ns
ns
ns
ns
Data Sheet
C
Notes
L
=30 pF

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