zl50031 Zarlink Semiconductor, zl50031 Datasheet - Page 47

• Manufacturer Part Number: zl50031
• Description: Flexible 4 K X 2 K Channel Digital Switch With H.110 Interface And 2 K X 2 K Local Switch
• Manufacturer: Zarlink Semiconductor

15 - 12
Read/Write Address: 002C
Reset Value: 0000
9 - 8
15
0
Bit
11
10
7
6
5
14
0
13
0
FDM1 -0
Unused
Name
HRST
MRST
BFEN
AFEN
CNIN
H
12
0
HRST
11
H
r
Table 20 - DPLL Operation Mode (DOM2) Register Bits
Reserved. In normal functional mode, these bits MUST be set to zero.
DPLL Holdover Memory Reset Bit: When HRST is low, the DPLL holdover
memory circuit is in functional mode. When HRST is high, the holdover memory
circuit will be reset. While the DPLL is in Holdover Mode, pulsing HRST high (or
holding it high continuously) will force the DPLL to the Freerun Mode.
MTIE Reset Bit: When MRST is low, the DPLL MTIE circuit is in functional mode.
When MRST is high, the MTIE circuit will be reset - the DPLL outputs will align
with the nearest edge of the selected reference. When the ZL50031 is operating
in the slave mode, this bit MUST be set high to keep the MTIE in the reset mode.
Failure Detect Mode Bits: These two bits control how to choose the Failure
Detection Mode.
B Clocks Fail Output Enable Bit: When BFEN is low, FAIL_B output is disabled,
i.e., tri-stated. When BFEN is high, FAIL_B output is enabled.
A Clocks Fail Output Enable Bit: When AFEN is low, FAIL_A output is disabled,
i.e., tri-stated. When AFEN is high, FAIL_A output is enabled.
CTREF1 and CTREF2 Inputs Inverted: When CNIN is high, the CTREF1 and
CTREF2 inputs will be inverted, prior to entering the DPLL module. When CNIN is
low, the CTREF1 and CTREF2 inputs will not be inverted.
MRST
FDM1
10
0
0
1
1
FDM1
9
FDM0
0
1
0
1
Zarlink Semiconductor Inc.
FDM0
8
Autodetect - Automatic Failure Detection by internal reference mon-
itor circuit
External - Failure Detection controlled by external inputs (PRI_LOS
and SEC_LOS)
Forced Primary - The DPLL is forced to use primary reference
Forced Secondary - The DPLL is forced to use secondary reference
ZL50031
BFEN
7
47
AFEN
6
Description
CNIN
Failure Detection Mode
5
DIV1
4
DIV0
3
2
0
CNS1
1
Data Sheet
CNS0
0