zl50031 Zarlink Semiconductor, zl50031 Datasheet - Page 10

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zl50031

Manufacturer Part Number
zl50031
Description
Flexible 4 K X 2 K Channel Digital Switch With H.110 Interface And 2 K X 2 K Local Switch
Manufacturer
Zarlink Semiconductor
Datasheet

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Pin Description (continued)
256 Pin HQFP
251 to 244
241 to 234
57 to 54
16 to 9
6 to 1
254
255
256
and
and
233
66
65
64
63
58
60
61
30
31
LREF0 - 3
SEC_LOS
ST_CKo0
ST_CKo1
PRI_LOS
ST_FPo0
ST_FPo1
D0 - D15
A0 - A13
C32/64o
NREFo
C1M5o
Name
R/W
DTA
CS
DS
Local Reference (5 V Tolerant Inputs). These pins accept 8 kHz,
1.544 MHz or 2.048 MHz local timing reference.
Network Reference Output (Output). Any local reference can be switched
to this output. The output data rate can be either the same as the selected
reference input data rate or divided to be 8 kHz.
Primary Reference Lost (5 V Tolerant Input). When this signal is high, it
indicates that PRIMARY REFERENCE is not valid. Combined with
SEC_LOS input, this input pin is used in the External Reference Switching
Mode of the DPLL.
Secondary Reference Lost (5 V Tolerant Input). When this signal is high,
it indicates that SECONDARY REFERENCE is not valid. Combined with the
PRI_LOS input, this input pin is used in the External Reference Switching
Mode of the DPLL.
C32/64o Clock (5 V Tolerant Output). A 32.768 MHz output clock when the
DPLL Clock Monitor register bit (CKM) is low. A 65.536 MHz clock when the
DPLL Clock Monitor register bit (CKM) is high.
C1.5o Clock (5 V Tolerant Output). A 1.544 MHz output clock.
ST-BUS Frame Pulse Output (5 V Tolerant Output). The width of this
output ST-BUS frame pulse can be 244 ns, 122 ns or 61 ns. The frequency
is 8 kHz.
ST-BUS Clock Output (5 V Tolerant Output). The frequency of this output
ST-BUS clock can be 4.096 MHz, 8.192 MHz or 16.384 MHz.
ST-BUS Frame Pulse Output (5 V Tolerant Output). The width of this
output ST-BUS frame pulse can be 244 ns, 122 ns or 61 ns. The frequency
is 8 kHz.
ST-BUS Clock Output (5 V Tolerant Output). The frequency of this output
ST-BUS clock can be 4.096 MHz, 8.192 MHz or 16.384 MHz.
Chip Select (5 V Tolerant Input). This active low input is used by the
microprocessor to access the microport.
Data Strobe (5 V Tolerant Input). This active low input works in conjunction
with CS to initiate the read and write cycles.
Read/Write (5 V Tolerant Input). This input controls the direction of the data
bus lines (D0 - D15) during the microprocessor access.
Address 0 - 13 (5 V Tolerant Inputs). These are the address lines to the
internal memories and registers.
Data Bus 0 - 15 (5 V Tolerant I/Os). These pins form the 16-bit data bus of
the microport.
Data Transfer Acknowledge (5 V Tolerant Output). This active low output
indicates that a data bus transfer is completed. A pull-up resistor is required
to hold a high level.
Zarlink Semiconductor Inc.
ZL50031
10
Description
Data Sheet

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