zl50031 Zarlink Semiconductor, zl50031 Datasheet - Page 22

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zl50031

Manufacturer Part Number
zl50031
Description
Flexible 4 K X 2 K Channel Digital Switch With H.110 Interface And 2 K X 2 K Local Switch
Manufacturer
Zarlink Semiconductor
Datasheet

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15.1.2
In the Secondary Master Mode, the ZL50031 drives the “B Clocks” (C8_B_io and FRAME_B_io), by locking to the
“A Clocks”. As required by the H.110 standard, the “B Clocks” are edge-synchronous with the “A Clocks”, as long as
jitter on the “A Clocks” meets Telcordia GR-1244-CORE specifications.
If the “A Clocks” become unreliable, system software is notified and the ZL50031 continues driving the “B Clocks” in
stable Holdover Mode until it makes a Stratum 4 Enhanced compatible switch to the secondary reference
(SEC_REF) for its network timing. The secondary reference can be a local network reference (LREF0-3), CTREF1
or CTREF2. If the “A Clocks” cannot recover, the designated secondary master can be promoted to primary master
by system software. This promotion will cause the “B Clocks” to assume the role of the “A Clocks”.
For the Secondary Master mode selection, see Table 21, "ZL50031 Mode Selection - By Programming DOM1 and
DOM2 Registers" on page 49.
15.1.3
In the Slave Mode, the ZL50031 is phase locked to the “A Clocks”. If the “A Clocks” become unreliable, the device
goes to stable Holdover Mode until it makes a Stratum 4 Enhanced compatible switch to the “B Clocks”. The
ZL50031 will perform all required functionality as long as the “A Clocks” and the “B Clocks” conform to the Telcordia
GR-1244-CORE jitter specifications.
In addition, the device can be used to generate a NREFo reference from its network references, LREF0-3. In most
systems NREFo is connected to either CT_REF1 or CT_REF2.
While the device is in Slave Mode and the “A Clocks” or the “B Clocks” do not recover, the designated slave can be
promoted to secondary master by system software. In that case, the network reference can be used as the
secondary reference.
Table 21 on page 49 shows how to program the DOM1 and DOM2 registers to enable the Slave Mode of the
ZL50031.
Secondary Master Mode
Slave Mode
Zarlink Semiconductor Inc.
ZL50031
22
Data Sheet

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