bt8970 Mindspeed Technologies, bt8970 Datasheet - Page 47

• Manufacturer Part Number: bt8970
• Description: Single-chip Hdsl Transceiver
• Manufacturer: Mindspeed Technologies

Bt8970
Single-Chip HDSL Transceiver
0x03—Interrupt Mask Register High (mask_high_reg)
Independent read/write mask bits for each of the IRQ Source Register [irq_source; 0x05] interrupt flags.
Individual mask bit behavior is identical to that specified for Interrupt Mask Register Low [mask_low_reg;
0x02].
sync
high_felm
low_felm
low_snr
0x04—Timer Source Register (timer_source)
Independent read/write (zero only) interrupt flags, one for each of eight internal timers. Each flag bit is set and
stays set when its corresponding timer value transitions from one to zero. If unmasked, this event will cause the
IRQ output to be activated. Flags are cleared by writing them with a logic zero value. Once cleared, a
steady-state timer value of zero will not cause a flag to be reasserted. Clearing an unmasked flag will cause the
IRQ output to return to the inactive state, if no other unmasked interrupt flags are set.
t4
t3
snr
meter
sut4
sut3
sut2
sut1
100101B
t4
7
–
7
Sync Indication
Far-End Level Meter High Alarm
Far-End Level Meter High Alarm
Signal-to-Noise Ratio Low Alarm
General Purpose Timer 4
General Purpose Timer 3
SNR Alarm Timer
Meter Timer
Startup Timer 4
Startup Timer 3
Startup Timer 2
Startup Timer 1
t3
6
6
–
Preliminary Information/Conexant Proprietary and Confidential
snr
5
–
5
meter
4
4
–
Conexant
sync
sut4
3
3
high_felm
sut3
2
2
low_felm
sut2
1
1
4.0 Register
low_snr
sut1
0
0
4-3