bt8970 Mindspeed Technologies, bt8970 Datasheet - Page 17

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bt8970

Manufacturer Part Number
bt8970
Description
Single-chip Hdsl Transceiver
Manufacturer
Mindspeed Technologies
Datasheet

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Bt8970
Single-Chip HDSL Transceiver
Table 1-2. Hardware Signal Definitions (3 of 4)
100101B
TXP, TXN
TXLDIP,
TXLDIN
TXPSP,
TXPSN
RXP, RXN
RXBP, RXBN
RBIAS
VCOMO
VCOMI
VCCAP
VRXP, VRXN
VTXP, VTXN
XTALI/
MCLK
XTALO
HCLK
XOUT
Pin Label
Transmit Posi-
tive, Negative
Transmit Line
Driver In Positive,
Negative
Transmit
Pulse-Shaping
Filter Positive,
Negative
Receive Positive,
Negative
Receive Balance
Positive, Negative
Resistor Bias
Common Mode
Voltage Outputs
Common Mode
Voltage Inputs
Voltage Compen-
sation Capacitor
Receiver Voltage
Reference Posi-
tive, Negative
Transmit Voltage
Reference Posi-
tive, Negative
Crystal In/Master
Clock
Crystal Output
High Speed Clock
Out
Crystal Clock Out
Signal Name
Preliminary Information/Conexant Proprietary and Confidential
I/O
OA
OA
OA
OA
OA
OA
OA
OA
IA
IA
IA
O
O
O
I
Voltage Reference Generator Interface
Differential Transmit Line Driver Outputs. These signals are used to drive the
subscriber line after passing through the hybrid and line transformer.
Differential Transmit Line Driver Inputs. These inputs should be connected to
the TXPSP, TXPSN outputs after passing through an external RC filter.
Differential Transmit Pulse-Shaping Filter Outputs. These outputs should be
connected to an external RC filter, which is then connected to the TXLDIP and
TXLDIN inputs.
Differential Receiver Inputs. RXP and RXN receive the signal from the sub-
scriber line.
Differential Receiver Balance Inputs. RXBP and RXBN are used to subtract the
echo of the signal being transmitted on the subscriber line. They should be con-
nected to the TXP, TXN output pins through the hybrid circuit. This signal is sub-
tracted from the signal being received by the RXP and RXN inputs in the
Variable Gain Amplifier (VGA).
Connection point for external bias resistor.
Common mode voltage for the analog circuitry. This pin should be connected to
an external filtering capacitor.
Common mode voltage for the analog circuitry. This pin should be connected to
an external filtering capacitor.
Analog Voltage Compensation Capacitor. This pin should be connected to an
external filtering capacitor.
Analog Receive Circuitry Reference Voltages. These pins should be connected to
external filtering capacitors.
Analog Transmit Circuitry Reference Voltages. These pins should be connected
to external filtering capacitors.
A bimodal input that can be used as the crystal input or as the master clock
input. If an external clock is connected to this input, XTALO should be left float-
ing. The frequency of the crystal or clock should be 16 times the symbol rate (8
times the data rate).
Connection point for the crystal.
HCLK can be configured to run at 16, 32, or 64 times the symbol rate. Upon
reset, it is set to 16 times the symbol rate. This clock will be phase locked to the
incoming data when the Bt8970 is configured as the remote unit.
Buffered-crystal oscillator output.
Analog Transmit Interface
Analog Receive Interface
Clock Interface
Conexant
Definition
1.0 System Overview
1.2 Pin Descriptions
1-9

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