bt8970 Mindspeed Technologies, bt8970 Datasheet - Page 22

• Manufacturer Part Number: bt8970
• Description: Single-chip Hdsl Transceiver
• Manufacturer: Mindspeed Technologies

2.0 Functional Description
2.2 Receive Section
2.2 Receive Section
Like the transmit section, the receive section consists of both analog and digital circuitry. The Variable Gain
Amplifier (VGA) provides the interface to the analog signals received from the line and the hybrid. The
Analog-to-Digital Converter (ADC) then digitizes the analog signal so it can be further processed in the Digital
Signal Processing (DSP) section of the receiver. The receiver DSP section includes: front-end processing, echo
cancellation, equalization, and symbol detection.
2.2.1 Variable Gain Amplifier
The Variable Gain Amplifier (VGA) has two purposes. The first is to provide a dual-differential analog input so
the pseudo-transmit signal created by the hybrid can be subtracted from the signal from the line transformer.
This subtraction provides first-order echo cancellation, which results in a first-order approximation of the signal
received from the line.
off-chip circuitry, including the hybrid and anti-alias filters, consists entirely of passive components. Further
echo cancellation occurs in the receiver DSP.
Figure 2-2. First-Order Echo Cancellation Using the Variable Gain Amplifier
the ADC. This reduces the resolution required for the ADC. There are six gain settings ranging from 0 dB to 15
dB. The gain is controlled via the gain[2:0] control bits in the ADC Control Register [adc_control; 0x21]. See
the Registers section of this datasheet for a more detailed description of the gain[2:0] control bits.
2.2.2 Analog-to-Digital Converter
The Analog-to-Digital Converter (ADC) provides 16 bits of resolution. The analog input from the variable gain
amplifier is converted into digital data and output at the symbol rate.
2-4
(Twisted Pair)
The second purpose of the VGA is to provide programmable gain of the received signal prior to passing it to
Line
Transformer
Line
Figure 2-2
+
–
Preliminary Information/Conexant Proprietary and Confidential
Impedance
Matching
Resistors
illustrates the recommended echo-cancellation circuit interconnections. All
Line
+
–
Hybrid
Conexant
Off-Chip Circuitry
Anti-alias
Anti-alias
Filter
Filter
RXBN
RXBP
On-Chip Circuitry
RXN
RXP
TXN
TXP
+
+
–
–
+
–
Single-Chip HDSL Transceiver
Driver
Line
+
–
Gain[2:0]
100101B
Bt8970
To
ADC
100101_006