ox16pci958 Oxford Electrical Products, ox16pci958 Datasheet - Page 33

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ox16pci958

Manufacturer Part Number
ox16pci958
Description
Octal Uart With Interface
Manufacturer
Oxford Electrical Products
Datasheet

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5.3.
This section explains how to determine what EEPROM data must be written to the device and gives a
worked example.
To decide on the EEPROM data, first list the sequence of values that need to be written to registers
and then work out the internal address for each register. Using the information in Table 30, EEPROM
information is as follows:
Setting the clock prescaler requires a sequence of writes, because the CPR is an indexed register.
This type of setting is usually done by the device driver controlling the card, but the operation is
included here as an example of how to do such a configuration, perhaps for use with an old device
driver. In this worst-case example, it takes seven EEPROM words to change one UART register, but
to add more register changes would not need so much EEPROM space.
Before accessing an indexed register, the indexed register safety catch must be switched off, using
the following sequence:
Table 31 shows how the example information above translates to EEPROM data.
DS-0022 Nov 05
containing the value number of register writes.
For example, to configure a product with eight serial ports, the following configuration is required:
The first word (address 00h) in the EEPROM must have an upper byte of 10h, and a lower byte
Following words must have an upper byte of internal address and a lower byte of data to write.
1. Switch off the safety catch for UART 0
2. Set IRSR for UART 0 to 16 (the index of the CPR)
3. Write the CPR value
4. Set IRSR for UART 0 back to 0, so that the scratch register is seen at offset 7 by default, for
5. Switch the safety catch for UART 0 back on
Set the PCI Vendor IDs to 1415h, and the Device IDs to 9538h
Enable UARTs 0 to 7
Set the clock prescaler for UART 0 to 1Ch to divide clock by 3.5 (this is just to demonstrate a
complex EEPROM sequence)
Set the PCI ID codes by writing registers in the internal address range 00h-19h (see Table 12
on page 15).
Set the UART enable and bank switching registers at internal addresses 40h, 41h and 4Ch,
as described in section 3.2.
Example EEPROM Data
backwards compatibility
External—Free Release
OX16PCI958 DATA SHEET
Page 33

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