ox16pci958 Oxford Electrical Products, ox16pci958 Datasheet - Page 29

• Manufacturer Part Number: ox16pci958
• Description: Octal Uart With Interface
• Manufacturer: Oxford Electrical Products

OXFORD SEMICONDUCTOR LTD.
4.8.
To
OX16PCI958 UART, and to clear the extended
registers safety catch:
Do not make any other read or write access to
the UART while writing the sequence of values
to the DLM. The sequence should be: 00h, 23h,
47h, 8Fh, 1Eh, 3Ch, 79h, F2h, E4h, C8h, 91h,
22h, 45h, 8Bh, 16h, 2Ch, 59h, B3h, 67h, CEh,
9Dh, 3Ah, 75h, EAh, D4h, A9h, 53h, A7h, 4Fh,
9Fh, 3Eh, 7Dh, FAh, F4h, E8h, D0h, A1h, 43h,
87h, 0Eh, 1Ch, 38h, 71h.
Extended Registers Safety Catch
Some host systems may violate the TL16Cx50
specifications and write to the MSR, which sets
IRSR in the OX16PCI958 UART and could lead
to failure due to an apparently failed scratch
register or corruption of the extended registers.
To prevent this problem, the IRSR is protected
by a safety catch. After any reset of the UART a
safety-catch is engaged which causes writes to
the MSR/IRSR address to be ignored.
To clear the safety catch and enable access to
the extended register set, an OX16PCI958-
aware device driver may perform the chip type
identification sequence to enable writes to the
IRSR until the next UART reset. Alternatively,
the safety catch can be written and read directly
at bit 7 of the SCC register.
Chip ID Register (CIDR)
Read-only
identification code so software can distinguish
between versions of the OX16PCI958, or future
components with a similar interface. Codes are
given in Table 27
DS-0022 Nov 05
a future device with the same extended-
register system. Write 2 to IRSR and read
CIDR to identify the device type. If IER4 is
clear, the chip is not a known device.
Ensure that bit 4 of IER is cleared
Write 80h to LCR
Write 00h to DLM
Set X=23h
Repeat the following 42 times:
If IER4 is set, the chip is an OX16PCI958 or
determine
and bit 6 of X
Chip Type Identification
Write the value X to DLM
Set X=X x 2
Set bit 0 of X to the exclusive-or of bit 7
register
whether
which
a
UART
provides
External—Free Release
is
an
a
Value
00-0Fh
10h
11-1Fh
others
UART Configuration Register (UCR)
Read-write register with reset value taken from
the configuration EEPROM.
Bit
2
1
0
MCR5
1
1
0
MCR4
0
0
1
1
1
Table 28 Operation when UCR0 is Cleared
Table 27 Chip Identification Code Values
Table 29 Operation when UCR0 is Set
Description
1—UART generates transmit-buffer-empty
interrupts until < 16 spaces are left in the
transmit FIFO, or no data is written
1—FIFOs are always 32 deep when FCR0 is
set
1—when MCR4 is cleared, auto flow control is
always on, even when the driver does not
enable it (should only be used if the attached
device is using RTS-CTS handshaking for flow
control)
MCR1
1
0
X
MCR5
X
X
1
1
0
Description
Reseved
UART conforming to this specification
Reserved for devices with register sets
compatible with the OX16PCI958. Device
drivers may assume the device conforms
with this specification, though additional
features may also be present.
Reserved
Flow Control Configuration
Auto-RTS# & auto-CTS# enabled
(auto flow control enabled)
Auto-CTS# only enabled
Auto-RTS# & auto-CTS# disabled
0
1
0
X
MCR1
1
OX16PCI958 DATA SHEET
Flow Control
Configuration
Auto-RTS# and auto-
CTS# enabled (auto flow
control enabled)
Auto-CTS# only
enabled, RTS#
deasserted
Auto-RTS# and auto-
CTS# enabled (auto flow
control enabled)
Auto-CTS# only enabled
Auto-RTS# and auto-
CTS# disabled
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