ox16pci958 Oxford Electrical Products, ox16pci958 Datasheet - Page 26

• Manufacturer Part Number: ox16pci958
• Description: Octal Uart With Interface
• Manufacturer: Oxford Electrical Products

OXFORD SEMICONDUCTOR LTD.
Receive FIFO Flow-Control Trigger Register
(RFTR)
This register allows an arbitrary trigger level to
be set for auto-RTS flow control (see section
4.7). If the value in this register is non-zero, it
is used instead of the trigger level set by
FCR7:6. Valid values are 0 to 31.
Receive FIFO Interrupt Trigger Register
(RITR)
This register allows an arbitrary trigger level to
be set for the received data available. If the
value in this register is non-zero, it is used
instead of the trigger level set by FCR7:6.
Valid values are 0 to 31.
Transmit FIFO Interrupt Trigger Register
(TITR)
This register allows an arbitrary trigger level to
be set for the THRE interrupt. Valid values are
0 to 31. If the value in this register is non-zero,
then when the number of bytes in the transmit
FIFO drops from TITR+1 to TITR the THRE
interrupt state will be set. The THRE interrupt
is still also generated when the transmit FIFO
becomes empty, allowing for the case where
less than TITR characters have been written to
the transmit FIFO.
Modem Control Register (MCR)
The MCR controls the interface with the
modem or data set as described in Figure 20.
MCR can be written and read. The RTS# and
DTR# outputs are directly controlled by their
control bits in this register (unless the UART is
in loopback mode). A high input asserts a low
signal (active) at the output terminals. The
MCR bits are shown below:
DS-0022 Nov 05
Bit
5
4
3
Description
1—enables auto flow-control as
described in section 4.7. Auto flow-
control may also be enabled by UCR0
Provides a local loopback feature for
diagnostic testing of the channel. See
section 4.6.
1—enables external serial channel
interrupt
External—Free Release
Note: MCR7:6 are permanently cleared.
4.6.
The UART enters loopback mode when MCR4
is set, which is useful for testing. Serial data
and modem control outputs SOUT, DTR#,
RTS#, OUT1#, and OUT2# are forced into an
inactive (high) state so that attached devices
are not affected. The signals which normally
feed these pins are fed into the serial data and
modem control inputs (SIN, CTS#, DSR#,
DCD#, and RI#), which are disconnected from
their input pins.
In this mode, data transmitted is immediately
received, allowing the host to test the UART
transmit and receive data paths. Interrupt
control continues to operate based on the
state of the looped-back signals rather than
the actual SOUT, DTR#, RTS#, OUT1#, and
OUT2# input pins.
input
pin
1
0
Internal signal
normally controlled
by this pin
SIN
CTS#
DTR#
DCD#
RI#
MCR4
1—RTS# output is forced low
0—RTS# output is forced high
The RTS# output of the serial channel
can be input into an inverting line driver
to obtain the proper polarity input at the
modem or data set
1—DTR# output is forced low
0—DTR# output is forced high
The DTR# output of the serial channel
can be input into an inverting line driver in
order to obtain the proper polarity input at
the modem or data set
Loopback Mode
1
0
loop-back signal
Normal UART
OX16PCI958 DATA SHEET
behaviour
is controlled by the signal
which normally goes to this
output pin: output is forced
high
SOUT
DTR#
DSR#
OUT1#
OUT2#
‘1’
1
0
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output
pin