tmp1941af TOSHIBA Semiconductor CORPORATION, tmp1941af Datasheet - Page 53
tmp1941af
Manufacturer Part Number
tmp1941af
Description
32-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1941AF.pdf
(354 pages)
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Note 1:
Note 2:
Note 3:
XT1
XT2
5.1.3
X1
X2
fperiph
SYSCR0.
SYSCR0.
When the clock gear is used to reduce the system clock frequency (fsys), the prescalars within on-chip
peripherals must be programmed so that the prescaler output (φ φ φ φ Tn) satisfies the following relationship:
Descriptions of each peripheral on the following sections include tables showing legal programming alternatives.
When the low-speed clock (fs) is used as the system clock, all on-chip peripherals except the Watchdog Timer
(WDT) and the Real-Time Counter (RTC) must be disabled.
The presclar clock source (φ φ φ φ Tn) must not be changed while any of the peripherals to which it is supplied are
running.
Oscillator
Oscillator
fs
fsys
Speed
XTEN
Speed
XEN
High-
Low-
Clock Source Block Diagrams
φ φ φ φ Tn < fsys / 2
fosc
fs
SYSCR0.WUEF
SYSCR2.WUPT[1:0]
SYSCR3.LUPTM
SYSCR1.DFOSC
÷2
PLL
÷2
Lock (PLL) Timer
Warm-up Timer
fpll = fosch × 4
÷4
Figure 5.3 Clock Source Block Diagrams
PRCK[1:0]
SYSCR0.
MUX
SYSCR3.SCOSEL
TMP1941AF-13
PLLOFF (Default setting pin)
fc
Real-Time Counter
÷2
(RTC)
÷4
÷8
DMAC
INTC
ROM
RAM
CPU
÷2
φT0
SYSCR1.GEAR[1:0]
The default is 1/8 on reset.
fgear
SYSCR1.SYSCK
SYSCR1.FPSEL
÷2
SBI, PIO, WDT, RTC
On-chip peripherals:
ADC, TMRA/B, SIO,
On-chip peripherals:
SCOUT
TMRA/B, SIO, SBI
(prescaler input)
÷4
TMP1941AF
ADCCK[1:0]
fperiph
(To on-chip
peripherals)
fs
fsys
2003-03-27
fadc
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