aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 94
aduc7030
Manufacturer Part Number
aduc7030
Description
Integrated Precision Battery Sensor For Automotive
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7030.pdf
(150 pages)
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ADuC7030/ADuC7033
GENERAL PURPOSE I/O
The ADuC7030/ADuC7033 features 9 General Purpose bi-
directional I/O pins (GPIO). In general, many of the GPIO pins
have multiple functions which can be configured by user code.
By default, the GPIO pins are configured in GPIO mode. All
GPIO pins have an internal pull up resistor and their sink
capability is 0.8mA and they can source 0.1mA.
The 9 GPIO are grouped into three ports, Port0, Port1 and
Port2. Port0 is 5 bits wide. Port1 and Port2 are both 2 bits wide.
The GPIO assignment within each port is detailed in Table 52.
A typical GPIO structure is shown Figure 35.
External Interrupts are present on GP0, GP5, GP7 and GP8.
This interrupts are level triggered and are active high. These
interrupts are not latched, therefore the interrupts source must
be present until either IRQSTA or FIQSTA are interrogated.
The Interrupt source must be active for at least 1 CD divided
core clock to guarantee recognition.
OUTPUT DRIVE ENABLE
1
GPxDAT[31:24]
GPxDAT[23:16]
OUTPUT DATA
ONLY AVAILABLE ON GP0, GP5, GP7, AND GP8.
Figure 35. ADuC7030/ADuC7033 GPIO
GPxDAT[7:0]
INPUT DATA
GPIO IRQ
Rev. PrE | Page 94 of 150
1
All port pins are configured and controlled by 4 sets (1 set for
each port) of four port specific MMRs:
- GPxCON: Port x Control Register
- GPxDAT: Port x Configuration and Data Register
- GPxSET: Data set port x
- GPxCLR: Data clear port x
where x corresponds to the port number 0,1 or 2
During normal operation, user code can control the function
and state of the external GPIO pins via these general purpose
registers. All GPIO pins will retain their external (high or low)
during power-down (POWCON) mode.
REG_DVDD
GPIO
Preliminary Technical Data
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