aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 133

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
LIN Hardware Synchronization Status Register:
Name:
Address:
Default Value:
Access:
Function:
Table 86. LHSSTA MMR Bit Descriptions
Bit
31 -
7
6
5
4
3
2
1
0
Description
Reserved
These read-only bits are reserved for future use
Rising edge Detected (BSD Mode Only)
This bit is set to 1 by hardware to indicate a rising edge has been detected on the BSD Bus.
This bit is cleared to 0, after user code reads the LHSSTA MMR
LHS Reset Complete Flag
This bit is set to 1 by hardware to indicate a LHS Reset Command has completed successfully.
This bit is cleared to 0, after user code reads the LHSSTA MMR
Break Field Error
This bit is set to 1 by hardware and generates an LHS Interrupt (IRQEN[7]) when the 12-bit, Break Timer (LHSVAL1) register overflows
to indicate the LIN bus has stayed low too long thus indicating a possible LIN bus error.
This bit is cleared to 0, after user code reads the LHSSTA MMR
LHS Compare Interrupt
This bit is set to 1 by hardware when the value in LHSVAL0 (LIN Synchronization Bit Timer) = the value in the LHSCMP register.
This bit is cleared to 0, after user code reads the LHSSTA MMR
Stop Condition Interrupt
This bit is set to 1 by hardware when a stop condition is detected.
This bit is cleared to 0, after user code reads LHSSTA MMR
Start Condition Interrupt
This bit is set to 1 by hardware when a start condition is detected.
This bit is cleared to 0, after user code reads LHSSTA MMR
Break Timer Compare Interrupt
This bit is set to 1 by hardware when a valid LIN Break condition is detected. A LIN Break condition is generated when the LIN Break
Timer value reaches the Break timer compare value (see LHSVAL1 description below).
This bit is cleared to 0, after user code reads the LHSSTA MMR
Read Only
LHSSTA
0xFFFF0780
0x00000000
The LHS Status register is a 32-bit register whose bits reflect the current operating status of the ADuC7030/ADuC7033
LIN interface
Rev. PrE | Page 133 of 150
ADuC7030/ADuC7033