aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 87

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Timer1 Capture Register:
Name:
Address:
Default
Value:
Access:
Function:
Table 48. T1CON MMR Bit Descriptions
Bit
31-24
23
22-20
19
18
17
16-12
11-9
8
7
6
5-4
3-0
Description
8 Bit Post-Scalar
By writing to these 8 bits, a value is written to the post-scalar. Writing 0 is interpreted as a 1.
By reading these 8 bits, the current value of the counter is read.
Timer 1 Enable Post-Scalar:
Set To enable Timer1 Post Scalar. If enabled, an interrupts will be generated after T1CON[31-24] periods as defined by
T1LD. Cleared To disable Timer1 Post Scalar.
These bits are reserved and should be written as 0 by user code
Post-Scalar Compare Flag (read only).
Set if the number of Timer1 overflows is equal to the number written to the post-scalar
Timer 1 Interrupt Source
Set To select interrupt generation from post-scalar counter
Cleared To select interrupt generation direct from Timer1
Event Select bit:
Set by user to enable time capture of an event
Cleared by user to disable time capture of an event
Event select range, 0 to 31. The events are as described in Table 46. Timer Event Capture
Clock select:
000
001
010
011
Count up:
Set by user for timer 1 to count up
Cleared by user for timer 1 to count down (Default)
Timer1 enable bit:
Set by user to enable timer 1
Cleared by user to disable timer 1 (Default)
Timer 1 mode:
Set by user to operate in periodic mode. Cleared by user to operate in free-running mode (Default)
Format:
00
01
10
11
Pre-Scalar:
0000
0100
1000
1111
T1CAP
0xFFFF0330
0x00000000
Read Only
This is a 32-bit register, which holds the 32-bit
value captured by an enabled IRQ event.
Binary (Default)
Reserved
Hr:Min:Sec:Hundredths – 23 hours to 0 hour
Hr:Min:Sec:Hundredths – 255 hours to 0 hour
Core clock ( Default )
Low Power 32.768kHz Oscillator
GPIO_8
GPIO_5
Source clock / 1 (Default)
Source clock / 16
Source clock / 256
Source clock / 32768
Rev. PrE | Page 87 of 150
Timer1 Control Register:
Name:
Address:
Default
Value:
Access:
Function:
T1CON
0xFFFF0328
0x01000000
Read/Write
This 32-bit MMR configures the mode of
operation of Timer1.
ADuC7030/ADuC7033