aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 137

• Manufacturer Part Number: aduc7030
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
LIN Hardware Break Timer1 Register:
Name:
Address:
Default Value:
Access:
Function:
LIN HARDWARE INTERFACE
LIN Frame Protocol
The LIN frame protocol is broken into 4 main categories:
The format of the frame header, Break, Synchronization Byte
and Protected Identifier are shown in Figure 42. Essentially, the
embedded UART, LIN Hardware Synchronization logic and the
high voltage transceiver interface all combine on-chip to
support and manage LIN based transmissions and receptions.
LIN Frame Break Symbol
As shown in Figure 43, the LIN “break” symbol is used to signal
the start of a new frame. It lasts at least 13-bit periods and a
slave must be able to detect a “break” symbol, even if it expects
data or is in the process of receiving data. The
ADuC7030/ADuC7033 accomplishes this by using the
LHSVAL1 Break Condition and Break Error Detect
functionality as described earlier. The “break” period does not
have to be accurately measured, but if a bus fault condition (bus
held low) occurs, it must be flagged.
x
x
x
x
Break Symbol
SYNC Byte
Protected Identifier
Data Bytes
Read/Write
When user code reads this location, the 12-bit value returned is the value of the internal LIN break timer, which is
clocked directly from the on-chip low power (131KHz) oscillator and times the LIN Break pulse. A negative edge on
the LIN bus or user code reading the LHSVAL1 will result in the timer and the register contents being reset to 0.
When user code writes to this location, the 12-bit value is actually written not to the LIN Break timer but to a LIN
Break Compare register.
In LIN mode of operation the value in the compare register is continuously compared to the break timer value. A LIN
Break interrupt (IRQEN[7] and LHSSTA[0]) is generated when the timer value reaches the compare value. After the
Break Condition interrupt, the LIN Break timer continues to count until the rising edge of the Break signal. If a rising
edge is not detected and the 12-bit timer overflows (4096 X 1/131KHz= 31msecs), a Break Field Error Interrupt
(IRQEN[7] and LHSSTA[4]) will be generated. By default, the value in the compare register is 0x47, this corresponds
to 11 X Bit periods i.e. the minimum pulse width for a LIN break pulse at 20kbps. For different baud rates, this value
may be changed by writing to. It is also important to note that if a valid break interrupt is not received then subsequent
Sync pulse timing via LHSVAL0 register will not occur.
LHSVAL1
0xFFFF0790
0x000(read) or 0x047(write)
Rev. PrE | Page 137 of 150
LIN Frame Synchronization Byte
The baud rate of the communication via LIN is calculated from
the SYNC Byte. This can be seen in Figure 44. The time
between the first falling edge of the Sync Field and the fifth
falling edge of the Sync Field is measured. This is then divided
by eight to give the baud rate of the data that will be
transmitted. The ADuC7030/ADuC7033 implements the
timing of this Sync byte in hardware. For more information on
this feature, please refer to LIN Hardware Synchronization.
LIN Frame Protected Identifier
After receiving the LIN synch field, the required baud rate for
the UART is calculated. The UART is then configured, which
allows the ADuC7030/ADuC7033 to receive the Protected
Identifier, as shown in Figure 45. The Protected Identifier
consists of two sub-fields, the identifier and the identifier
parity. The six-bit identifier contains the identifier of the target
for the frame. The identifier signifies the number of data bytes
to be either received or transmitted. The number of bytes is
user configurable at system level design. The parity is calculated
on the identifier, and is dependent on the revision of LIN the
system is designed for.
LIN Frame Data Byte
The data byte frame carries between one and eight bytes of
data. The number of bytes contained in the frame will be
dependent on the LIN Master. The data byte frame is split into
data bytes as shown in Figure 46.
ADuC7030/ADuC7033