peb20532 Infineon Technologies Corporation, peb20532 Datasheet - Page 223
peb20532
Manufacturer Part Number
peb20532
Description
2 Channel Serial Optimized Communication Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20532.pdf
(282 pages)
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Data Sheet
FLEX
TIN
CSC
XMR
XOFF
Frame Length Exceeded Interrupt
This bit is set to ’1’, if the frame length check feature is enabled and the
current received frame is aborted because the programmed frame length
limit was exceeded (refer to registers
description).
Timer Interrupt
This bit is set to ’1’, if the internal timer was activated and has expired
(refer also to description of timer registers TIMR0..TIMR3).
CTS Status Change
This bit is set to ’1’, if a transition occurs on signal CTS. The current state
of signal CTS is monitored by status bit ’CTS’ in status register STARL.
Note: A transmit clock must be provided to detect a transition of CTS.
Transmit Message Repeat
This bit is set to ’1’, if transmission of the last frame has to be repeated
(by software), because
• the SCC has received a negative acknowledge to an I-frame (in HDLC
• a collision occured after at least 14.5 bytes of data have been
• CTS signal was deasserted after at least 14.5bytes of data have been
Note: For easy recovery from a collision event (in bus configuration
XOFF Character Detected Interrupt
ASYNC Mode:
This bit is set to ’1’, if the currently received character matched the XOFF
character programmed in register
transmitter is switched to ’XOFF’ state if in-band flow control is enabled
via bit ’FLON’ in register CCR2H.
Automode operation);
completely sent out, i.e. automatic re-transmission cannot be
performed by the SCC;
completely sent out.
only), the SCC transmit FIFO should not contain more than one
complete frame. This can be achieved by using the ’ALLS’
interrupt to control the corresponding transmit channel forwarding
a new frame on all sent (ALLS) event only.
5-223
XOFF
RLCRL/RLCRH
Register Description (ISR2)
and indicates, that the
(hdlc/bisync modes)
(async mode)
PEB 20532
PEF 20532
(hdlc mode)
for detailed
(all modes)
(all modes)
2000-09-14
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