ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 21

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Pin # Symbol
16
17
18
19
20
21
22
ADDR6
ADDR7
V
GND
ADDR8
ADDR9
ADDR10 Address Bus
DD
Table 1. 100-Pin LQFP Pin Identification of the eZ80190 Device (Continued)
Function
Address Bus
Address Bus
Power Supply
Ground
Address Bus
Address Bus
Signal Direction
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
PRELIMINARY
Description
The ADDR6 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR7 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
Power Supply
Ground
The ADDR8 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR9 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR10 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
Architectural Overview
7