MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 91

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
8.2
Due to the addressing mode of the MT90221, only
half of the memory locations are utilized when
operating in IMA mode. This is mainly due to the fact
that only links 0 to 3 can be used. With some
external circuitry, the addressing can be altered to
gain access to the unused half of the memory that
would correspond to the links 4 to 7.
Figure 23 shows how this can be achieved. The CS0
and CS1 signals are merged to generate a unique
CS0. The address bit 8 is not modified when bank 0
is accessed and it is inverted when the bank 1 is
accessed. The CTRL signal is included to enable or
disable the re-mapping circuitry in the case where a
layout is including stuffing options for an 8 port or a 4
port implementation. If the control feature is not
required, the circuitry can be simplified.
82
Optimum Usage of 1 Bank of Memory with
a 4 Port Device
CTRL = 0 -> Normal Operation
CTRL = 1 -> Single Bank Operation
CSi_0
ADDRi_8
CSi_1
CTRL
U7
U8
Figure 23 -Memory Optimization for the MT90221
U1
U2
U3
U4
U5
U6
U9
Note:
The two inverters, U9 and U10 here are to
make up a small delay to ensure that
CSo_0 comes after ADDRo_8 when in Single
Bank mode (in this mode, CSi_1 is routed to
both CSo_0 and ADDRo_8)
ADDRo_8
U10
CSo_0