MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 12

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

Pin Description
RXDATA_6
24, 25, 26,
RXDATA_7
RXDATA_5
27, 28, 29
REFCK_3
REFCK_2
REFCK_1
REFCK_0
SR_CS_0
SR_A_18
SR_A_17
SR_A_16
SR_A_15
SR_A_14
SR_A_13
SR_A_12
SR_A_11
SR_A_10
SR_CS 1
RXCLAV
SR_D_7
SR_D_6
SR_D_5
SR_D_4
SR_D_3
SR_D_2
SR_D_1
SR_D_0
SR_A_9
SR_A_8
SR_A_7
SR_A_6
SR_A_5
SR_A_4
SR_A_3
SR_A_2
SR_A_1
SR_A_0
22, 23,
SR_WE
RXSOC
Pin #
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
21
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
156
TxData
TxSOC
2
Name
154
[7:0]
4
152
6
150
8
I/O
148
I
I
10
ATM Input Port Signals (UTOPIA Transmit Interface)
146
UTOPIA Transmit Data Bus. Byte-wide data driven from ATM LAYER device to
MT90221. Bit 7 is the MSB. All arriving data between the last byte of the previous
cell and the first byte of the following cell (indicated by the SOC signal) is ignored.
UTOPIA Transmit Start of Cell Signal. Active HIGH signal asserted by the ATM
LAYER device when TxData[7:0] contains the first valid byte of the cell. After this
signal is high, the following 52 bytes should contain valid data. The MT90221 waits
for another TxSOC signal after reading a complete cell.
12
144
14
142
16
140
18
138
Figure 2 - Pin Connections
20
136
22
134
208 PIN MQFP
24
132
26
130 128 126 124 122 120 118 116 114 112 110 108 106
28
30
32
Description
34
36
38
40
42
44
46
48
50
MT90221
52
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
68
66
64
62
60
58
56
54
VSS
TXCKIO_2
VDD
TXCKIO_3
VSS
DSTO_3
TXSYNCIO_3
NC
NC
VSS
NC
VDD
NC
VSS
NC
NC
NC
NC
VDD
NC
VSS
NC
VDD
NC
NC
VSS
VDD
TEST2
TEST1
VDD
CLK
VSS
TCK
TMS
TDI
TRST
TDO
UP_IRQ
VDD
UP_A_0
UP_A_1
UP_A_2
UP_A_3
UP_A_4
UP_A_5
UP_A_6
UP_A_7
UP_A_8
UP_A_9
UP_A_10
RESET
VSS
3