MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 56

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
Bit #
7:5
4:0
6-5
1:0
7:0
7
4
3
2
Type
Type
R/W
R/W
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved, must write 0 for normal operation.
Link ID for the link N. The value can be between 0 and 31. This is the logical value
associated to a physical link. Used in IMA mode only.
Reserved, write 0 for normal operation.
Value of M. These 2 bits specifies the value of M for the IMA Group.
00: M=32,
01: M=64,
10: M=128
11: M=256
Timing Mode inserted in ICP cell. A 0 means that the ITC timing mode is inserted in the
ICP cell and a 1 means that the CTC timing mode is inserted in the ICP cell.
Timing Mode in RoundRobin scheduler. A 0 means that the ITC timing mode (adaptive)
algorithm is selected and a 1 means that the CTC timing mode (fixed) algorithm is
selected for internal operation.
Reserved. Write 0 for normal operation.
Reference Link. These 2 bits define which physical link is to be used as reference for
timing purposes.
Defines the ICP cell offset of link N. The value of M determines which significant bits are
used as follows:
M=256; bits 7-0 are used,
M=128; bits 6-0 are used;
M=64; bits 5-0 are used;
M=32; bits 4-0 are used.
0DD- 0E0
1 register per link, used in IMA mode only.
0DD: 00, 0DE: 01 0DF: 02, 0E0: 03
0C0 - 0C3
1 register per TX IMA Group
58
0C4 - 0C7
1 register per link, used in IMA mode only
0C4: 00, 0C5: 01 0C6: 02, 0C7: 03
Table 31 - TX Group Control Mode Registers
Table 33 - TX ICP Cell Offset Registers
Table 32 - TX Link ID Registers
Description
Description
Description
MT90221
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