MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 85

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
7.12 Miscellaneous Registers Description
Tables 103 to 105 describe the General Status and Test Register.
76
Address (Hex):
Direct access
Reset Value (Hex):
Address:
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
Bit #
7:4
7:0
7:0
5:4
1:0
3
2
1
0
7
6
3
2
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
R
R
Device Revision Number: reads 0001.
Set when the UTOPIA output clock is missing or too slow. This latched bit is cleared by
writing a 0.
Set when the UTOPIA input clock is missing or too slow. This latched bit is cleared by
writing a 0.
Overflow of 1 or more of the TX UTOPIA FIFO.
Set when there is no free cell in TX Cell RAM. This latched bit is cleared by writing a 0.
Write 0x60 for normal operation.
Reserved (different from written values).
Write 0 for normal operation.
Write 1 for normal operation.
Write 00 for normal operation
Write 1 before adding a link to an existing IMA group.
Write 0 when the link is reported in IMA mode.
Write 0 for normal operation.
Write IMA group number before adding a link to an IMA group.
206
10
04E
00
0DA
00
Table 103 - General Status Register
Table 104 - Test 1 Register
Table 105 - Test 2 Register
Description
Description
Description