MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 52

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Bin):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
Bit #
7:5
4:0
7-4
7
6
5
4
3
2
1
0
3
2
1
0
Type
Type
R/W
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Unused. Read all 0’s.
UTOPIA PHY Address of IMA Group N.
Reserved. Write 0 for normal operation.
Enable UTOPIA PHY address of link 3. A 1 enables the PHY port Address. UNI mode
Enable UTOPIA PHY address of link 2. A 1 enables the PHY port Address. UNI mode
Enable UTOPIA PHY address of link 1. A 1 enables the PHY port Address. UNI mode
Enable UTOPIA PHY address of link 0. A 1 enables the PHY port Address. UNI mode
Watch clock. This bit reflects the level present on the RX UTOPIA Clock pin when this
register is read.
Reserved, write 0 for normal operation.
Reset UTOPIA RX state machines when set to 1.
Reserved, write ’0’ for normal operation.
Enable UTOPIA PHY address of IMA Group 3. A 1 enables the PHY port Address.
Enable UTOPIA PHY address of IMA Group 2. A 1 enables the PHY port Address.
Enable UTOPIA PHY address of IMA Group 1. A 1 enables the PHY port Address.
Enable UTOPIA PHY address of IMA Group 0. A 1 enables the PHY port Address.
operation
048 - 04B
00
04D
register operation
X0000000
04C
correct register operation
00
1 reg. per IMA Group.link. The RxClk signal must be active for correct register
Table 20 - UTOPIA Output Group PHY Enable Register
1 register to enable the IMA Groups. The RxClk signal must be active for correct
1 register to enable the links in UNI mode. The RxClk signal must be active for
Table 19 - UTOPIA Output Link PHY Enable Register
Table 18 - UTOPIA Output Group Address Registers
Description
Description
Description
MT90221
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