MT58L256L32F Micron Semiconductor Products, Inc., MT58L256L32F Datasheet - Page 24

• Manufacturer Part Number: MT58L256L32F
• Description: 8Mb Syncburst SRAM, 3.3V Vdd, 3.3V or 2.5V I/O, Flow-Through,
• Manufacturer: Micron Semiconductor Products, Inc.

READ/WRITE TIMING PARAMETERS
NOTE: 1. Q(A4) refers to output from address A4. Q(A4 + 1) refers to output from the next internal burst address following A4.
8Mb: 512K x 18, 256K x 32/36 Flow-Through SyncBurst SRAM
MT58L512L18F_C.p65 – Rev. 2/02
BWa#-BWd#
SYM
t
f
t
t
t
t
t
t
t
KC
KF
KH
KL
KQ
OELZ
OEHZ
AS
ADSS
ADDRESS
(NOTE 4)
(NOTE 2)
ADSC#
ADSP#
BWE#,
ADV#
OE#
CLK
CE#
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When CE# is HIGH, CE2# is HIGH
3. The data bus (Q) remains in High-Z following a WRITE cycle unless an ADSP#, ADSC# or ADV# cycle is performed.
4. GW# is HIGH.
5. Back-to-back READs may be controlled by either ADSP# or ADSC#.
Q
D
MIN
and CE2 is LOW.
8.8
2.5
2.5
1.5
1.5
0
-7.5
A1
MAX
113
High-Z
7.5
4.2
t ADSS
t CES
t AS
Q(A1)
Back-to-Back READs
A2
MIN
10.0
3.0
3.0
1.8
1.8
t ADSH
t CEH
0
t KH
t AH
(NOTE 5)
-8.5
t KC
t KL
MAX
100
8.5
5.0
Q(A2)
t OEHZ
MIN
4.0
4.0
2.0
2.0
15
0
A3
-10
MAX
READ/WRITE TIMING
10.0
5.0
66
Single WRITE
t WS
t DS
D(A3)
UNITS
MHz
t DH
t WH
ns
ns
ns
ns
ns
ns
ns
ns
24
FLOW-THROUGH SYNCBURST SRAM
A4
t OELZ
SYM
t
t
t
t
t
t
t
t
WS
DS
CES
AH
ADSH
WH
DH
CEH
t KQ
Q(A4)
8Mb: 512K x 18, 256K x 32/36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
3
(NOTE 1)
-7.5
Q(A4+1)
BURST READ
MAX
Q(A4+2)
MIN
1.8
1.8
1.8
0.5
0.5
0.5
0.5
0.5
-8.5
MAX
Q(A4+3)
DON’T CARE
MIN
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
©2002, Micron Technology, Inc.
D(A5)
-10
A5
Back-to-Back
MAX
WRITEs
UNDEFINED
D(A6)
UNITS
A6
ns
ns
ns
ns
ns
ns
ns
ns