MT58L256L32F Micron Semiconductor Products, Inc., MT58L256L32F Datasheet

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MT58L256L32F

Manufacturer Part Number
MT58L256L32F
Description
8Mb Syncburst SRAM, 3.3V Vdd, 3.3V or 2.5V I/O, Flow-Through,
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet

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8Mb SYNCBURST
SRAM
FEATURES
• Fast clock and OE# access times
• Single +3.3V +0.3V/-0.165V power supply (V
• Separate +3.3V or +2.5V isolated output buffer
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL WRITE
• Three chip enables for simple depth expansion and
• Clock-controlled and registered addresses, data I/Os
• Internally self-timed WRITE cycle
• Burst control (interleaved or linear burst)
• Automatic power-down for portable applications
• 100-pin TQFP package
• 165-pin FBGA
• Low capacitive bus loading
• x18, x32, and x36 versions available
OPTIONS
• Timing (Access/Cycle/MHz)
• Configurations
• Packages
• Operating Temperature Range
8Mb: 512K x 18, 256K x 32/36 Flow-Through SyncBurst SRAM
MT58L512L18F_C.p65 – Rev. 2/02
supply (V
address pipelining
and control signals
7.5ns/8.8ns/113 MHz
8.5ns/10ns/100 MHz
10ns/15ns/66 MHz
3.3V I/O
512K x 18
256K x 32
256K x 36
2.5V I/O
512K x 18
256K x 32
256K x 36
100-pin TQFP (2-chip enable)
100-pin TQFP (3-chip enable)
165-pin, 13mm x 15mm FBGA
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)**
DD
Q)
MT58L256V36FT-10
Part Number Example:
MT58L512L18F
MT58L256L32F
MT58L256L36F
MT58L512V18F
MT58L256V32F
MT58L256V36F
MARKING
None
-7.5
-8.5
-10
IT
DD
T
S
F*
)
FLOW-THROUGH SYNCBURST SRAM
1
MT58L512L18F, MT58L256L32F,
MT58L256L36F; MT58L512V18F,
MT58L256V32F, MT58L256V36F
3.3V V
* A Part Marking Guide for the FBGA devices can be found on Micron’s
** Industrial temperature range offered in specific speed grades and
GENERAL DESCRIPTION
speed, low-power CMOS designs that are fabricated us-
ing an advanced CMOS process.
256K x 32, or 256K x 36 SRAM core with advanced syn-
chronous peripheral circuitry and a 2-bit burst counter.
All synchronous inputs pass through registers controlled
by a positive-edge-triggered single-clock input (CLK).
The synchronous inputs include all addresses, all data
inputs, active LOW chip enable (CE#), two additional
chip enables for easy depth expansion (CE2#, CE2), burst
control inputs (ADSC#, ADSP#, ADV#), byte write
Web
NOTE: 1. JEDEC-standard MS-026 BHA (LQFP).
configurations. Contact factory for more information.
The Micron
Micron’s 8Mb SyncBurst SRAMs integrate a 512K x 18,
site—http://www.micron.com/support/index.html.
8Mb: 512K x 18, 256K x 32/36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
, 3.3V or 2.5V I/O, Flow-Through
®
SyncBurst
100-Pin TQFP
165-Pin FBGA
SRAM family employs high-
1
©2002, Micron Technology, Inc.

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