MT58L256L32F Micron Semiconductor Products, Inc., MT58L256L32F Datasheet - Page 23

• Manufacturer Part Number: MT58L256L32F
• Description: 8Mb Syncburst SRAM, 3.3V Vdd, 3.3V or 2.5V I/O, Flow-Through,
• Manufacturer: Micron Semiconductor Products, Inc.

WRITE TIMING PARAMETERS
NOTE: 1. D(A2) refers to output from address A2. D(A2 + 1) refers to output from the next internal burst address following A2.
8Mb: 512K x 18, 256K x 32/36 Flow-Through SyncBurst SRAM
MT58L512L18F_C.p65 – Rev. 2/02
SYM
t
f
t
t
t
t
t
t
t
KC
KF
KH
KL
OEHZ
AS
ADSS
AAS
WS
BWa#-BWd#
ADDRESS
(NOTE 2)
ADSC#
ADSP#
BWE#,
ADV#
GW#
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
3. OE# must be HIGH before the input data setup and held HIGH throughout the data hold time. This prevents input/
4. ADV# must be HIGH to permit a WRITE to the loaded address.
5. Full-width WRITE can be initiated by GW# LOW; or GW# HIGH and BWE#, BWa# and BWb# LOW for x18 device; or GW#
OE#
CLK
CE#
MIN
Q
D
8.8
2.5
2.5
1.5
1.5
1.5
1.5
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
output data contention for the time period prior to the byte write enable inputs being sampled.
HIGH and BWE#, BWa#-BWd# LOW for x32 and x36 devices.
-7.5
BURST READ
MAX
113
4.2
High-Z
t ADSS
t CES
t AS
MIN
10.0
A1
3.0
3.0
1.8
1.8
1.8
1.8
t ADSH
t CEH
t AH
t KH
t OEHZ
(NOTE 3)
BYTE WRITE signals are
ignored when ADSP# is LOW.
-8.5
t KC
t ADSS
MAX
t KL
Single WRITE
100
t DS
5.0
D(A1)
t ADSH
t DH
MIN
4.0
4.0
2.0
2.0
2.0
2.0
15
A2
-10
(NOTE 4)
MAX
5.0
66
D(A2)
(NOTE 5)
WRITE TIMING
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
D(A2 + 1)
(NOTE 1)
t WS
BURST WRITE
23
FLOW-THROUGH SYNCBURST SRAM
t WH
SYM
t
t
t
t
t
t
t
t
DS
CES
AH
ADSH
AAH
WH
DH
CEH
D(A2 + 1)
8Mb: 512K x 18, 256K x 32/36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ADV# suspends burst.
MIN
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
D(A2 + 2)
-7.5
ADSC# extends burst.
MAX
D(A2 + 3)
MIN
1.8
1.8
0.5
0.5
0.5
0.5
0.5
0.5
-8.5
t ADSS
A3
D(A3)
MAX
t ADSH
Extended BURST WRITE
t AAS
t WS
D(A3 + 1)
MIN
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
t WH
t AAH
©2002, Micron Technology, Inc.
-10
MAX
DON’T CARE
D(A3 + 2)
UNITS
ns
ns
ns
ns
ns
ns
ns
ns